May 2009
FDL100N50F N-Channel MOSFET
©2009 Fairchild Semiconductor Corporation
FDL100N50F Rev. A
www.fairchildsemi.com1
UniFET
TM
FDL100N50F
N-Channel MOSFET,FRFET
500V, 100A, 0.055Ω
Features
•R
DS(on) = 0.043Ω ( Typ.)@ VGS = 10V, ID = 50A
• Low gate charge ( Typ. 238nC)
• Low Crss ( Typ. 64pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS Compliant
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
MOSFET Maximum Ratings TC = 25oC unless otherwise noted
Thermal Characteristics
Symbol Parameter FDL100N50F Units
VDSS Drain to Source Voltage 500 V
VGSS Gate to Source Voltage ±30 V
IDDrain Current -Continuous (TC = 25oC) 100 A
-Continuous (TC = 100oC) 60
IDM Drain Current - Pulsed (Note 1) 400 A
EAS Single Pulsed Avalanche Energy (Note 2) 5000 mJ
IAR Avalanche Current (Note 1) 100 A
EAR Repetitive Avalanche Energy (Note 1) 73.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 20 V/ns
PDPower Dissipation (TC = 25oC) 2500 W
- Derate above 25oC20W/
oC
TJ, TSTG Operating and Storage Temperature Range -55 to +150 oC
TL
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds 300 oC
Symbol Parameter Min. Max. Units
RθJC Thermal Resistance, Junction to Case - 0.05
oC/WRθCS Thermal Resistance, Case to Sink Typ. 0.1 -
RθJA Thermal Resistance, Junction to Ambient - 30
*Drain current limited by maximum junction temperature
D
G
S
TO-264
FDL Series
GSD
FDL100N50F N-Channel MOSFET
FDL100N50F Rev. A www.fairchildsemi.com
2
Package Marking and Ordering Information
Electrical Characteristics TC = 25oC unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Device Marking Device Package Reel Size Tape Width Quantity
FDL100N50F FDL100N50F TO-264 - - 30
Symbol Parameter Test Conditions Min. Typ. Max. Units
BVDSS Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V, TC = 25oC 500 - - V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250µA, Referenced to 25oC-0.5-V/
oC
IDSS Zero Gate Voltage Drain Current VDS = 500V, VGS = 0V - - 10 µA
VDS = 400V, TC = 125oC - - 100
IGSS Gate to Body Leakage Current VGS = ±30V, VDS = 0V - - ±100 nA
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250µA3.0-5.0V
RDS(on) Static Drain to Source On Resistance VGS = 10V, ID = 50A - 0.043 0.055 Ω
gFS Forward Transconductance VDS = 20V, ID = 50A (Note 4) -95-S
Ciss Input Capacitance VDS = 25V, VGS = 0V
f = 1MHz
- 12000 - pF
Coss Output Capacitance - 1700 - pF
Crss Reverse Transfer Capacitance - 64 - pF
Qg(tot) Total Gate Charge at 10V VDD = 400V, ID = 50A
VGS = 10V
- 238 - nC
Qgs Gate to Source Gate Charge - 74 - nC
Qgd Gate to Drain “Miller” Charge - 95 - nC
td(on) Turn-On Delay Time
VDD = 250V, ID = 50A
RG = 4.7Ω
-63-ns
trTurn-On Rise Time - 186 - ns
td(off) Turn-Off Delay Time - 202 - ns
tfTurn-Off Fall Time - 105 - ns
ISMaximum Continuous Drain to Source Diode Forward Current - - 100 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 400 A
VSD Drain to Source Diode Forward Voltage VGS = 0V, ISD = 100A - - 1.5 V
trr Reverse Recovery Time VGS = 0V, ISD = 100A
dIF/dt = 100A/µs
- 250 - ns
Qrr Reverse Recovery Charge - 1.5 - nC
Notes:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 1mH, IAS = 100A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
3. ISD ≤ 100A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
FDL100N50F N-Channel MOSFET
FDL100N50F Rev. A www.fairchildsemi.com
3
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
0.1 1 10
0.5
1
10
100
300
*Notes:
1. 250
µ
s Pulse Test
2. T
C
= 25
o
C
V
GS
=
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
I
D
, Drain Current[A]
V
DS
, Drain-Source Voltage[V]
46810
1
10
100
400
-55
o
C
150
o
C
*Notes:
1. V
DS
= 20V
2. 250
µ
s Pulse Test
25
o
C
I
D
, Drain Current[A]
V
GS
, Gate-Source Voltage[V]
0.0 0.5 1.0 1.5
1
10
100
300
*Notes:
1. V
GS
= 0V
2. 250
µ
s Pulse Test
150
o
C
I
S
, Reverse Drain Current [A]
VSD, Body Diode Forward Voltage [V]
25
o
C
0 50 100 150 200 250
0.03
0.04
0.05
0.06
0.07
*Note: T
C
= 25
o
C
V
GS
= 20V
V
GS
= 10V
R
DS(ON)
[
Ω
]
,
Drain-Source On-Resistance
I
D
, Drain Current [A]
10
-1
110
30
0
5000
10000
15000
20000
25000
30000
C
oss
C
iss
C
iss
= C
gs
+ C
gd
(
C
ds
= shorted
)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
*Note:
1. V
GS
= 0V
2. f = 1MHz
C
rss
Capacitances [pF]
V
DS
, Drain-Source Voltage [V]
0 50 100 150 200 250
0
2
4
6
8
10
*Note: ID = 50A
V
DS
= 100V
V
DS
= 250V
V
DS
= 400V
VGS, Gate-Source Voltage [V]
Q
g
, Total Gate Charge [nC]
FDL100N50F N-Channel MOSFET
FDL100N50F Rev. A www.fairchildsemi.com
4
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 11. Transient Thermal Response Curve
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
*Notes:
1. V
GS
= 0V
2. I
D
= 1mA
BV
DSS
, [Normalized]
Drain-Source Breakdown Voltage
T
J
, Junction Temperature
[
o
C
]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
*Notes:
1. V
GS
= 10V
2. I
D
= 50A
R
DS(on)
, [Normalized]
Drain-Source On-Resistance
T
J
, Junction Temperature
[
o
C
]
1 10 100 1000
0.01
0.1
1
10
100
1000
30
µ
s
100
µ
s
1ms
10ms
I
D
, Drain Current [A]
V
DS
, Drain-Source Voltage [V]
Operation in This Area
is Limited by R
DS(on)
*Notes:
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
DC
25 50 75 100 125 150
0
20
40
60
80
100
120
I
D
, Drain Current [A]
T
C
, Case Temperature
[
o
C
]
10
-5
10
-4
10
-3
10
-2
10
-1
1
0.0001
0.001
0.01
0.1
0.01
0.1
0.2
0.05
0.02
*Notes:
1. Z
θ
JC
(t) = 0.05
o
C/W Max.
2. Duty Factor, D= t
1
/t
2
3. T
JM
- T
C
= P
DM
* Z
θ
JC
(t)
0.5
Single pulse
Thermal Response
[
Z
θ
JC
]
Rectangular Pulse Duration [sec]
t
1
P
DM
t
2
FDL100N50F N-Channel MOSFET
FDL100N50F Rev. A www.fairchildsemi.com
5
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FDL100N50F N-Channel MOSFET
FDL100N50F Rev. A www.fairchildsemi.com
6
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
V
DS
+
_
Driver
R
G
Sam e Type
as D U T
V
GS
• dv/dt controlled by R
G
•I
SD
controlled by pulse period
V
DD
L
I
SD
10V
V
GS
( D riv e r )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body D iode
Forw ard Volta
g
e D rop
V
SD
I
FM
, Body Diode Forw ard C urrent
Body D iode R everse C urrent
I
RM
Body D iode Recovery dv/dt
di/dt
D = G ate Pulse W idth
Gate Pulse Period
--------------------------
DUT
V
DS
+
_
Driver
R
G
Sam e Type
as D U T
V
GS
• dv/dt controlled by R
G
•I
SD
controlled by pulse period
V
DD
LL
I
SD
10V
V
GS
( D riv e r )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body D iode
Forw ard Volta
g
e D rop
V
SD
I
FM
, Body Diode Forw ard C urrent
Body D iode R everse C urrent
I
RM
Body D iode Recovery dv/dt
di/dt
D = G ate Pulse W idth
Gate Pulse Period
--------------------------
D = G ate Pulse W idth
Gate Pulse Period
--------------------------
FDL100N50F N-Channel MOSFET
FDL100N50F Rev. A www.fairchildsemi.com
7
Mechanical Dimensions
Dimensions in Millimeters
FDL100N50F MOSFET
FDL100N50F Rev. A www.fairchildsemi.com8
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™*
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®
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™
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µSerDes™
UHC®
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VCX™
VisualMax™
XS™
tm
®
tm
tm
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Rev. I40