JM38510/00205BCA - National Semiconductor

TL/F/6526

5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops

with Preset, Clear and Complementary Outputs

June 1989

5474/DM5474/DM7474

Dual Positive-Edge-Triggered D Flip-Flops

with Preset, Clear and Complementary Outputs

General Description

This device contains two independent positive-edge-trig-

gered D flip-flops with complementary outputs. The informa-

tion on the D input is accepted by the flip-flops on the posi-

tive going edge of the clock pulse. The triggering occurs at a

voltage level and is not directly related to the transition time

of the rising edge of the clock. The data on the D input may

be changed while the clock is low or high without affecting

the outputs as long as the data setup and hold times are not

violated. A low logic level on the preset or clear inputs will

set or reset the outputs regardless of the logic levels of the

other inputs.

Features

YAlternate Military/Aerospace device (5474) is available.

Contact a National Semiconductor Sales Office/Distrib-

utor for specifications.

Connection Diagram

Dual-In-Line Package

TL/F/6526–1

Order Number 5474DMQB, 5474FMQB, DM5474J, DM5474W, DM7474M or DM7474N

See NS Package Number J14A, M14A, N14A or W14B

Function Table

Inputs Outputs

PR CLR CLK D Q Q

LH XXHL

HL XXLH

LL XXH*H*

HH L

LL H

HH LXQ

High Logic Level

XeEither Low or High Logic Level

LeLow Logic Level

ePositive-going transition of the clock.

*eThis configuration is nonstable; that is, it will not persist when either the preset and/or clear

inputs return to their inactive (high) level.

Q0eThe output logic level of Q before the indicated input conditions were established.

C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Note)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales

Office/Distributors for availability and specifications.

Supply Voltage 7V

Input Voltage 5.5V

Operating Free Air Temperature Range

DM54 and 54 b55§Ctoa

125§C

DM74 0§Ctoa

70§C

Storage Temperature Range b65§Ctoa

150§C

Note:

The ‘‘Absolute Maximum Ratings’’ are those values

beyond which the safety of the device cannot be guaran-

teed. The device should not be operated at these limits. The

parametric values defined in the ‘‘Electrical Characteristics’’

table are not guaranteed at the absolute maximum ratings.

The ‘‘Recommended Operating Conditions’’ table will define

the conditions for actual device operation.

Recommended Operating Conditions

Symbol Parameter DM5474 DM7474 Units

Min Nom Max Min Nom Max

VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V

VIH High Level Input Voltage 2 2 V

VIL Low Level Input Voltage 0.8 0.8 V

IOH High Level Output Current b0.4 b0.4 mA

IOL Low Level Output Current 16 16 mA

fCLK Clock Frequency (Note 2) 0 15 0 15 MHz

tWPulse Width Clock High 30 30

(Note 2) Clock Low 37 37 ns

Clear Low 30 30

Preset Low 30 30

tSU Input Setup Time (Notes1&2) 20

tHInput Hold Time (Notes1&2) 5

TAFree Air Operating Temperature b55 125 0 70 §C

Note 1: The symbol (

) indicates the rising edge of the clock pulse is used for reference.

Note 2: TAe25§C and VCC e5V.

Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units

(Note 3)

VIInput Clamp Voltage VCC eMin, IIeb

12 mA b1.5 V

VOH High Level Output VCC eMin, IOH eMax 2.4 3.4 V

Voltage VIL eMax, VIH eMin

VOL Low Level Output VCC eMin, IOL eMax 0.2 0.4 V

Voltage VIH eMin, VIL eMax

IIInput Current @Max VCC eMax, VIe5.5V 1mA

Input Voltage

IIH High Level Input VCC eMax D 40

Current VIe2.4V Clock 80 mA

Clear 120

Preset 40

IIL Low Level Input VCC eMax D b1.6

Current VIe0.4V Clock b3.2 mA

(Note 6) Clear b3.2

Preset b1.6

IOS Short Circuit VCC eMax DM54 b20 b55 mA

Output Current (Note 4) DM74 b18 b55

ICC Supply Current VCC eMax (Note 5) 17 30 mA

Note 3: All typicals are at VCC e5V, TAe25§C.

Note 4: Not more than one output should be shorted at a time.

Note 5: With all outputs open, ICC is measured with the Q and Q outputs high in turn. At the time of measurement the clock is grounded.

Note 6: Clear is tested with preset high and preset is tested with clear high.

Switching Characteristics at VCC e5V and TAe25§C (See Section 1 for Test Waveforms and Output Load)

From (Input) RLe400X

Symbol Parameter To (Output) CLe15 pF Units

Min Max

fMAX Maximum Clock 15 MHz

Frequency

tPHL Propagation Delay Time Preset 40 ns

High to Low Level Output to Q

tPLH Propagation Delay Time Preset 25 ns

Low to High Level Output to Q

tPHL Propagation Delay Time Clear 40 ns

High to Low Level Output to Q

tPLH Propagation Delay Time Clear 25 ns

Low to High Level Output to Q

tPHL Propagation Delay Time Clock to 40 ns

High to Low Level Output Q or Q

tPLH Propagation Delay Time Clock to 25 ns

Low to High Level Output Q or Q

Physical Dimensions inches (millimeters)

14-Lead Ceramic Dual-In-Line Package (J)

Order Number 5474DMQB or DM5474J

NS Package Number J14A

Physical Dimensions inches (millimeters) (Continued)

14-Lead Small Outline Molded Package (M)

Order Number DM7474M

NS Package Number M14A

14-Lead Molded Dual-In-Line Package (N)

Order Number DM7474N

NS Package Number N14A

5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops

with Preset, Clear and Complementary Outputs

Physical Dimensions inches (millimeters) (Continued)

14-Lead Ceramic Flat Package (W)

Order Number 5474FMQB or DM5474W

NS Package Number W14B

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failure to perform, when properly used in accordance support device or system, or to affect its safety or

with instructions for use provided in the labeling, can effectiveness.

be reasonably expected to result in a significant injury

to the user.

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