LTC4444
1
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TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
High Voltage Synchronous
N-Channel MOSFET Driver
The LTC
®
4444 is a high frequency high voltage gate driver
that drives two N-channel MOSFETs in a synchronous
DC/DC converter with supply voltages up to 100V. This
powerful driver reduces switching losses in MOSFETs with
high gate capacitance.
The LTC4444 is configured for two supply-independent
inputs. The high side input logic signal is internally
level-shifted to the bootstrapped supply, which may
function at up to 114V above ground.
The LTC4444 contains undervoltage lockout circuits that
disable the external MOSFETs when activated. Adaptive
shoot-through protection prevents both MOSFETs from
conducting simultaneously.
For a similar driver in this product family, please refer to
the chart below.
PARAMETER LTC4444 LTC4446 LTC4444-5
Shoot-Through Protection Yes No Yes
Absolute Max TS 100V 100V 100V
MOSFET Gate Drive 7.2V to 13.5V 7.2V to 13.5V 4.5V to 13.5V
VCC UV+6.6V 6.6V 4V
VCC UV6.15V 6.15V 3.55V
n Bootstrap Supply Voltage to 114V
n Wide VCC Voltage: 7.2V to 13.5V
n Adaptive Shoot-Through Protection
n 2.5A Peak TG Pull-Up Current
n 3A Peak BG Pull-Up Current
n 1.2Ω TG Driver Pull-Down
n 0.55Ω BG Driver Pull-Down
n 5ns TG Fall Time Driving 1nF Load
n 8ns TG Rise Time Driving 1nF Load
n 3ns BG Fall Time Driving 1nF Load
n 6ns BG Rise Time Driving 1nF Load
n Drives Both High and Low Side N-Channel MOSFETs
n Undervoltage Lockout
n Thermally Enhanced 8-Pin MSOP Package
n Distributed Power Architectures
n Automotive Power Supplies
n High Density Power Modules
n Telecommunications
High Input Voltage Buck Converter LTC4444 Driving a 1000pF Capacitive Load
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6677210.
TG
BOOST
VIN
100V
(ABS MAX)
GND
TS
VCC
TINP
LTC4444
BG
PWM2
(FROM CONTROLLER IC)
PWM1
(FROM CONTROLLER IC)
VCC
7.2V TO 13.5V
BINP
VOUT
4444 TA01a
BINP
5V/DIV
BG
10V/DIV
TINP
5V/DIV
TG-TS
10V/DIV
20ns/DIV 4444 TA01b
LTC4444
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PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS
Supply Voltage
V
CC......................................................... 0.3V to 14V
BOOST – TS ........................................... 0.3V to 14V
TINP Voltage ..................................................–2V to 14V
BINP Voltage ..................................................–2V to 14V
BOOST Voltage .........................................0.3V to 114V
TS Voltage .................................................. –5V to 100V
Operating Junction Temperature Range
(Notes 2, 3) ........................................ 55°C to 150°C
Storage Temperature Range ..................65°C to 150°C
Lead Temperature (Soldering, 10 sec) ...................300°C
(Note 1)
1
2
3
4
TINP
BINP
VCC
BG
8
7
6
5
TS
TG
BOOST
NC
TOP VIEW
9
GND
MS8E PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 40°C/W, θJC = 10°C/W (NOTE 4)
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Gate Driver Supply, VCC
VCC Operating Voltage 7.2 13.5 V
IVCC DC Supply Current TINP = BINP = 0V 350 550 µA
UVLO Undervoltage Lockout Threshold VCC Rising
VCC Falling
Hysteresis
l
l
6.00
5.60
6.60
6.15
450
7.20
6.70
V
V
mV
Bootstrapped Supply (BOOST – TS)
IBOOST DC Supply Current TINP = BINP = 0V 0.1 2 µA
Input Signal (TINP, BINP)
VIH(BG) BG Turn-On Input Threshold BINP Ramping High l2.25 2.75 3.25 V
VIL(BG) BG Turn-Off Input Threshold BINP Ramping Low l1.85 2.3 2.75 V
VIH(TG) TG Turn-On Input Threshold TINP Ramping High l2.25 2.75 3.25 V
VIL(TG) TG Turn-Off Input Threshold TINP Ramping Low l1.85 2.3 2.75 V
ITINP(BINP) Input Pin Bias Current ±0.01 ±2 µA
The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = VBOOST = 12V, VTS = GND = 0V, unless otherwise noted.
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4444EMS8E#PBF LTC4444EMS8E#TRPBF LTDBF 8-Lead Plastic MSOP –40°C to 125°C
LTC4444IMS8E#PBF LTC4444IMS8E#TRPBF LTDBF 8-Lead Plastic MSOP –40°C to 125°C
LTC4444HMS8E#PBF LTC4444HMS8E#TRPBF LTDBF 8-Lead Plastic MSOP 40°C to 150°C
LTC4444MPMS8E#PBF LTC4444MPMS8E#TRPBF LTDBF 8-Lead Plastic MSOP 55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LTC4444
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Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4444 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC4444E is guaranteed to meet specifications from 0°C
to 85°C junction temperature. Specifications over the –40°C to 125°C
operating junction temperature range are assured by design, charac-
terization and correlation with statistical process controls. The LTC4444I
is guaranteed over the –40°C to 125°C operating temperature range, the
LTC4444H is guaranteed over the –40°C to 150°C operating temperature
range and the LTC4444MP is tested and guaranteed over the full –55°C to
150°C operating junction temperature range. High junction temperatures
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = VBOOST = 12V, VTS = GND = 0V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
High Side Gate Driver Output (TG)
VOH(TG) TG High Output Voltage ITG = –10mA, VOH(TG) = VBOOST – VTG 0.7 V
VOL(TG) TG Low Output Voltage ITG = 100mA, VOL(TG) = VTG –VTS l120 250 mV
IPU(TG) TG Peak Pull-Up Current l1.7 2.5 A
RDS(TG) TG Pull-Down Resistance l1.2 2.5 Ω
Low Side Gate Driver Output (BG)
VOH(BG) BG High Output Voltage IBG = –10mA, VOH(BG) = VCC – VBG 0.7 V
VOL(BG) BG Low Output Voltage IBG = 100mA l55 125 mV
IPU(BG) BG Peak Pull-Up Current l23 A
RDS(BG) BG Pull-Down Resistance l0.55 1.25 Ω
Switching Time [BINP (TINP) is Tied to Ground While TINP (BINP) is Switching. Refer to Timing Diagram]
tPLH(TG) TG Low-High Propagation Delay l25 50 ns
tPHL(TG) TG High-Low Propagation Delay l22 45 ns
tPLH(BG) BG Low-High Propagation Delay l19 40 ns
tPHL(BG) BG High-Low Propagation Delay l14 35 ns
tr(TG) TG Output Rise Time 10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
8
80
ns
ns
tf(TG) TG Output Fall Time 10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
5
50
ns
ns
tr(BG) BG Output Rise Time 10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
6
60
ns
ns
tf(BG) BG Output Fall Time 10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
3
30
ns
ns
degrade operating lifetimes; operating lifetime is derated for junction
temperatures greater than 125°C. Note that the maximum ambient
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal impedance and other environmental factors.
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in watts) according to
the formula:
T
J = TA + (PDθJA)
where θJA (in °C/W) is the package thermal impedance.
Note 4: Failure to solder the exposed back side of the MS8E package to the
PC board will result in a thermal resistance much higher than 40°C/W.
LTC4444
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TYPICAL PERFORMANCE CHARACTERISTICS
VCC Supply Quiescent Current
vs Voltage
BOOST-TS Supply Quiescent
Current vs Voltage
VCC Supply Current
vs Temperature
Boost Supply Current
vs Temperature
Output Low Voltage (VOL)
vs Supply Voltage
Output High Voltage (VOH)
vs Supply Voltage
Input Thresholds (TINP, BINP)
vs Supply Voltage
Input Thresholds (TINP, BINP)
vs Temperature
Input Thresholds (TINP, BINP)
Hysteresis vs Voltage
VCC SUPPLY VOLTAGE (V)
0
0
QUIESCENT CURRENT (µA)
50
150
200
250
6 7 8 9 10 11 12 13
450
4444 G01
100
12345 14
300
350
400 TINP = BINP = 0V
TINP(BINP) = 12V
TA = 25°C
BOOST = 12V
TS = GND
BOOST SUPPLY VOLTAGE (V)
0
0
QUIESCENT CURRENT (µA)
50
150
200
250
6 7 8 9 10 11 12 13
400
4444 G02
100
12345 14
300
350
TINP = BINP = 0V
TINP = 0V, BINP = 12V
TINP = 12V, BINP = 0V
TA = 25°C
VCC = 12V
TS = GND
TEMPERATURE (°C)
VCC SUPPLY CURRENT (µA)
350
360
370
4444 G03
330
300
–55 –25 5 35 65 95 125 150
380
340
320
310
TINP = BINP = 0V
VCC = BOOST = 12V
TS = GND
TINP(BINP) = 12V
TEMPERATURE (°C)
BOOST SUPPLY CURRENT (µA)
250
300
350
4444 G04
150
0
400
200
100
50
TINP = 12V
BINP = 0V
TINP = 0V
BINP = 12V
TINP = BINP = 0V
VCC = BOOST = 12V
TS = GND
–55 –25 5 35 65 95 125 150
SUPPLY VOLTAGE (V)
7
OUTPUT VOLTAGE (mV)
140
10
4444 G05
80
40
89 11
20
0
160
120
100
60
12 13 14
VOL(TG)
VOL(BG)
TA = 25°C
ITG(BG) = 100mA
BOOST = VCC
TS = GND
SUPPLY VOLTAGE (V)
7
5
TG OR BG OUTPUT VOLTAGE (V)
6
8
9
10
15
12
911 12
4444 G06
7
13
–1mA
14
11
810 13 14
TA = 25°C
BOOST = VCC
TS = GND
–10mA
–100mA
SUPPLY VOLTAGE (V)
7
2.1
TG OR BG INPUT THRESHOLD (V)
2.2
2.4
2.5
2.6
3.1
2.8
911 12
4444 G07
2.3
2.9
3.0
2.7
810 13 14
TA = 25°C
BOOST = VCC
TS = GND
VIH(TG,BG)
VIL(TG,BG?)
SUPPLY VOLTAGE (V)
78
375
TG OR BG INPUT THRESHOLD HYSTERESIS (mV)
425
500
911 12
4444 G09
400
475
450
10 13 14
TA = 25°C
VCC = BOOST = 12V
TS = GND
–55 –25 5 35 65 95 125 150
TEMPERATURE (°C)
TG OR BG INPUT THRESHOLD (V)
2.6
2.8
3.0
4444 G08
2.4
2.2
2.5
2.7
2.9
2.3
2.1
2.0
VCC = BOOST = 12V
TS = GND
VIH(TG,BG)
VIL(TG,BG)
LTC4444
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TYPICAL PERFORMANCE CHARACTERISTICS
Input Thresholds (TINP, BINP)
Hysteresis vs Temperature
VCC Undervoltage Lockout
Thresholds vs Temperature
Rise and Fall Time
vs VCC Supply Voltage
Rise and Fall Time
vs Load Capacitance
Peak Driver (TG, BG) Pull-Up
Current vs Temperature
Output Driver Pull-Down
Resistance vs Temperature
Propagation Delay
vs VCC Supply Voltage Propagation Delay vs Temperature
TEMPERATURE (°C)
375
TG OR BG INPUT THRESHOLD HYSTERESIS (mV)
425
500
4444 G10
400
475
450
VCC = BOOST = 12V
TS = GND
–55 –25 5 35 65 95 125 150 –55 –25 5 35 65 95 125 150
TEMPERATURE (°C)
6.0
VCC SUPLLY VOLTAGE (V)
6.1
6.3
6.4
6.5
6.7
4444 G11
6.2
6.6
RISING THRESHOLD
FALLING THRESHOLD
BOOST = VCC
TS = GND
SUPPLY VOLTAGE (V)
7
RISE/FALL TIME (ns)
12
28
30
22
26
32
911 12
4444 G12
8
20
16
10
24
6
18
14
810 13 14
TA = 25°C
BOOST = VCC
TS = GND
CL = 3.3nF tr(TG)
tr(BG)
tf(TG)
tf(BG)
LOAD CAPACITANCE (nF)
1
RISE/FALL TIME (ns)
40
50
60
9
4444 G13
30
20
0357
210
468
10
80
70
tr(TG)
tr(BG)
tf(TG)
tf(BG)
TA = 25°C
VCC = BOOST = 12V
TS = GND
–55 –25 5 35 65 95 125 150
TEMPERATURE (°C)
2.0
PULL-UP CURRENT (A)
2.2
2.6
2.8
3.0
3.4
4444 G14
2.4
3.2
IPU(BG)
IPU(TG)
VCC = BOOST = 12V
TS = GND
TEMPERATURE (°C)
OUTPUT DRIVER PULL-DOWN RESISTACNE ()
1.2
1.6
2.0
2.2
4444 G15
0.8
0.4
1.0
1.4
1.8
0.6
0.2
VCC = 14V
VCC = 7V
RDS(TG)
RDS(BG)
BOOST-TS = 7V
–55 –25 5 35 65 95 125 150
BOOST-TS = 12V
VCC = 12V
BOOST-TS = 14V
SUPPLY VOLTAGE (V)
7
10
PROPAGATION DELAY (ns)
12
16
18
20
30
24
911 12
4444 G16
14
26
28
22
810 13 14
TA = 25°C
BOOST = VCC
TS = GND
tPLH(TG)
tPLH(BG)
tPHL(BG)
tPHL(TG)
–55 –25 5 35 65 95 125 150
TEMPERATURE (°C)
2
PROPAGATION DELAY (ns)
7
17
22
27
37
4444 G17
12
32
VCC = BOOST = 12V
TS = GND
tPLH(TG) tPHL(TG)
tPLH(BG)
tPHL(BG)
LTC4444
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PIN FUNCTIONS
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Supply Current
vs Input Frequency
Switching Supply Current
vs Load Capacitance
TINP (Pin 1): High Side Input Signal. Input referenced
to GND. This input controls the high side driver output
(TG).
BINP (Pin 2): Low Side Input Signal. This input controls
the low side driver output (BG).
VCC (Pin 3): Supply. This pin powers input buffers, logic
and the low side gate driver output directly and the high
side gate driver output through an external diode con-
nected between this pin and BOOST (Pin 6). A low ESR
ceramic bypass capacitor should be tied between this pin
and GND (Pin 9).
BG (Pin 4): Low Side Gate Driver Output (Bottom Gate).
This pin swings between VCC and GND.
NC (Pin 5): No Connect. No connection required.
BOOST (Pin 6): High Side Bootstrapped Supply. An ex-
ternal capacitor should be tied between this pin and TS
(Pin 8). Normally, a bootstrap diode is connected between
VCC (Pin 3) and this pin. Voltage swing at this pin is from
VCC – VD to VIN + VCC – VD, where VD is the forward volt-
age drop of the bootstrap diode.
TG (Pin 7): High Side Gate Driver Output (Top Gate). This
pin swings between TS and BOOST.
TS (Pin 8): High Side MOSFET Source Connection (Top
Source).
GND (Exposed Pad Pin 9): Ground. Must be soldered to
PCB ground for optimal thermal performance.
SWITCHING FREQUENCY (kHz)
0
SUPPLY CURRENT (mA)
1.5
2.0
2.5
600 1000
4444 G18
1.0
0.5
0200 400 800
3.0
3.5
4.0
IBOOST
(TG SWITCHING)
IBOOST (BG SWITCHING)
IVCC
(BG SWITCHING)
IVCC
(TG SWITCHING)
TA = 25°C
VCC = BOOST = 12V
TS = GND
LOAD CAPACITANCE (nF)
1
SUPPLY CURRENT (mA)
10
100
1345
0.1
2789610
4444 G19
IVCC
(BG SWITCHING
AT 1MHz)
IBOOST
(TG SWITCHING
AT 500kHz)
IBOOST
(TG SWITCHING
AT 1MHz)
IBOOST (BG SWITCHING AT 1MHz OR 5OOkHz)
IVCC
(BG SWITCHING
AT 500kHz)
IVCC
(TG SWITCHING AT 500kHz)
IVCC
(TG SWITCHING
AT 1MHz)
LTC4444
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BLOCK DIAGRAM
3
6
7
9HIGH SIDE
LEVEL SHIFTER
VCC UVLO
LDO VINT
VCC
GND
7.2V TO
13.5V
BOOST VIN
UP TO 100V
TG
8
TS
BG
4444 BD
1TINP
BINP
2
5
NC
LOW SIDE
LEVEL SHIFTER
ANTISHOOT-THROUGH
PROTECTION
VCC VCC
4
TIMING DIAGRAMS
90%
INPUT RISE/FALL TIME < 10ns
TINP (BINP)
BG (TG)
BINP (TINP)
TG (BG)
90% 90%
trtf
tPHL tPLH
10%
4444 TD02
10%
10%
Switching Time
Adaptive Shoot-Through Protection
BINP
BG
TINP
TG-TS
BINP
BG
TINP
TG-TS
4444 TD01
LTC4444
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OPERATION
Overview
The LTC4444 receives ground-referenced, low voltage digi-
tal input signals to drive two N-channel power MOSFETs in
a synchronous buck power supply configuration. The gate
of the low side MOSFET is driven either to VCC or GND,
depending on the state of the input. Similarly, the gate of
the high side MOSFET is driven to either BOOST or TS by
a supply bootstrapped off of the switching node (TS).
Input Stage
The LTC4444 employs CMOS compatible input thresholds
that allow a low voltage digital signal to drive standard
power MOSFETs. The LTC4444 contains an internal
voltage regulator that biases both input buffers for high
side and low side inputs, allowing the input thresholds
(VIH = 2.75V, VIL = 2.3V) to be independent of variations in
VCC. The 450mV hysteresis between VIH and VIL eliminates
false triggering due to noise during switching transitions.
However, care should be taken to keep both input pins
(TINP and BINP) from any noise pickup, especially in high
frequency, high voltage applications. The LTC4444 input
buffers have high input impedance and draw negligible
input current, simplifying the drive circuitry required for
the inputs.
6
BOOST
LTC4444
8
TS
TG
7
VIN
UP TO 100V
Q1
M1 CGS
CGD
3
VCC
9
GND
4
BG
Q2
M2
LOW SIDE
POWER
MOSFET
HIGH SIDE
POWER
MOSFET
CGS
CGD
LOAD
INDUCTOR
4444 FO1
Figure 1. Capacitance Seen by BG and TG During Switching
Output Stage
A simplified version of the LTC4444’s output stage is shown
in Figure 1. The pull-up devices on the BG and TG outputs
are NPN bipolar junction transistors (Q1 and Q2). The BG
and TG outputs are pulled up to within an NPN VBE (~0.7V)
of their positive rails (VCC and BOOST, respectively). Both
BG and TG have N-channel MOSFET pull-down devices
(M1 and M2) which pull BG and TG down to their nega-
tive rails, GND and TS. The large voltage swing of the BG
and TG output pins is important in driving external power
MOSFETs, whose RDS(ON) is inversely proportional to the
gate overdrive voltage (VGS − VTH).
Rise/Fall Time
The LTC4444’s rise and fall times are determined by the
peak current capabilities of Q1 and M1. The predriver that
drives Q1 and M1 uses a nonoverlapping transition scheme
to minimize cross-conduction currents. M1 is fully turned
off before Q1 is turned on and vice versa.
Since the power MOSFET generally accounts for the ma-
jority of the power loss in a converter, it is important to
quickly turn it on or off, thereby minimizing the transition
time in its linear region. An additional benefit of a strong
LTC4444
9
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pull-down on the driver outputs is the prevention of cross-
conduction current. For example, when BG turns the low
side (synchronous) power MOSFET off and TG turns the
high side power MOSFET on, the voltage on the TS pin
will rise to VIN very rapidly. This high frequency positive
voltage transient will couple through the CGD capacitance
of the low side power MOSFET to the BG pin. If there is
an insufficient pull-down on the BG pin, the voltage on
the BG pin can rise above the threshold voltage of the low
side power MOSFET, momentarily turning it back on. With
both the high side and low side MOSFETs conducting,
significant cross-conduction current will flow through the
MOSFETs from VIN to ground and will cause substantial
power loss. A similar effect occurs on TG due to the CGS
and CGD capacitances of the high side MOSFET.
The powerful output driver of the LTC4444 reduces the
switching losses of the power MOSFET, which increase
with transition time. The LTC4444’s high side driver is
capable of driving a 1nF load with 8ns rise and 5ns fall
times using a bootstrapped supply voltage VBOOST-TS of
12V while its low side driver is capable of driving a 1nF
load with 6ns rise and 3ns fall times using a supply volt-
age VCC of 12V.
Undervoltage Lockout (UVLO)
The LTC4444 contains an undervoltage lockout detector
that monitors VCC supply. When VCC falls below 6.15V,
the output pins BG and TG are pulled down to GND and
TS, respectively. This turns off both external MOSFETs.
When VCC has adequate supply voltage, normal operation
will resume.
Adaptive Shoot-Through Protection
Internal adaptive shoot-through protection circuitry moni-
tors the voltages on the external MOSFETs to ensure that
they do not conduct simultaneously. This feature improves
efficiency by eliminating cross-conduction current from
flowing from the VIN supply through both of the MOSFETs
to ground during a switch transition. If both TINP and
BINP are high at the same time, BG will be kept off and
TG will be turned on (refer to the Timing Diagram). If BG
is still high when TINP turns on, TG will not be turned on
until BG goes low.
When TINP turns off, the adaptive shoot-through protec-
tion circuitry monitors the level of the TS pin. BG can be
turned on if the TS pin goes low. If the TS pin stays high,
BG will be turned on 150ns after TINP turns off.
APPLICATIONS INFORMATION
Power Dissipation
To ensure proper operation and long-term reliability, the
LTC4444 must not operate beyond its maximum tem-
perature rating. Package junction temperature can be
calculated by:
T
J = TA + PD (θJA)
where:
T
J = Junction temperature
T
A = Ambient temperature
P
D = Power dissipation
θJA = Junction-to-ambient thermal resistance
Power dissipation consists of standby and switching
power losses:
P
D = PDC + PAC + PQG
where:
PDC = Quiescent power loss
PAC = Internal switching loss at input frequency, fIN
PQG = Loss due turning on and off the external MOSFET
with gate charge QG at frequency fIN
The LTC4444 consumes very little quiescent current. The
DC power loss at VCC = 12V and VBOOST-TS = 12V is only
(350µA)(12V) = 4.2mW.
OPERATION
LTC4444
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APPLICATIONS INFORMATION
At a particular switching frequency, the internal power loss
increases due to both AC currents required to charge and
discharge internal node capacitances and cross-conduc-
tion currents in the internal logic gates. The sum of the
quiescent current and internal switching current with no
load are shown in the Typical Performance Characteristics
plot of Switching Supply Current vs Input Frequency.
The gate charge losses are primarily due to the large AC
currents required to charge and discharge the capacitance
of the external MOSFETs during switching. For identical
pure capacitive loads CLOAD on TG and BG at switching
frequency fIN, the load losses would be:
P
CLOAD = (CLOAD)(f)[(VBOOST-TS)2 + (VCC)2]
In a typical synchronous buck configuration, VBOOST-TS
is equal to VCC – VD, where VD is the forward voltage
drop across the diode between VCC and BOOST. If this
drop is small relative to VCC, the load losses can be
approximated as:
P
CLOAD = 2(CLOAD)(fIN)(VCC)2
Unlike a pure capacitive load, a power MOSFETs gate
capacitance seen by the driver output varies with its VGS
voltage level during switching. A MOSFETs capacitive load
power dissipation can be calculated using its gate charge,
QG. The QG value corresponding to the MOSFETs VGS
value (VCC in this case) can be readily obtained from the
manufacturers QG vs VGS curves. For identical MOSFETs
on TG and BG:
P
QG = 2(VCC)(QG)(fIN)
To avoid damage due to power dissipation, the LTC4444
includes a temperature monitor that will pull BG and TG
low if the junction temperature rises above 160°C. Normal
operation will resume when the junction temperature cools
to less than 135°C.
Bypassing and Grounding
The LTC4444 requires proper bypassing on the VCC
and VBOOST-TS supplies due to its high speed switching
(nanoseconds) and large AC currents (Amperes). Careless
component placement and PCB trace routing may cause
excessive ringing.
To obtain the optimum performance from the LTC4444:
A. Mount the bypass capacitors as close as possible
between the VCC and GND pins and the BOOST and
TS pins. The leads should be shortened as much as
possible to reduce lead inductance.
B. Use a low inductance, low impedance ground plane
to reduce any ground drop and stray capacitance.
Remember that the LTC4444 switches greater than
3A peak currents and any significant ground drop will
degrade signal integrity.
C. Plan the power/ground routing carefully. Know where
the large load switching current is coming from and
going to. Maintain separate ground return paths for
the input pin and the output power stage.
D. Keep the copper trace between the driver output pin
and the load short and wide.
E. Be sure to solder the Exposed Pad on the back side of
the LTC4444 package to the board. Correctly soldered
to a 2500mm2 double sided 1oz copper board, the
LTC4444 has a thermal resistance of approximately
40°C/W for the MS8E package. Failure to make good
thermal contact between the exposed back side and
the copper board will result in thermal resistances far
greater than 40°C/W.
LTC4444
11
4444fb
PGOOD
SS
SENSE+
SENSE
ITH
VOSENSE
SGND
RUN
FCB
PLLFLTR
PLLIN
STBYMD
BOOST1
TG1
SW1
VIN
EXTVCC
INTVCC
BG1
PGND
BG2
SW2
TG2
BOOST2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
LTC3780EG
10k
100
100
220k
VOS+
15k
220k
487k
1% 8.25k
1%
1000pF
100pF
47pF
VIN
D5
0.1µF
100V
68pF
0.022µF
0.1µF
16V
2.2µF, 100V, TDK C4532X7R2A225MT
C1: SANYO 100ME100HC +T
C2, C3: SANYO 63ME220HC + T
D1: ON SEMI MMDL770T1G
D2: DIODES INC. 1N5819HW-7-F
D3, D4: DIODES INC. PDS560-13
D5: DIODES INC. MMBZ5230B-7-F
D6: DIODES INC. B1100-13-F
L1: SUMIDA CDEP147NP-100MC-125
R1, R2: VISHAY DALE WSL2512R0250FEA
0.1µF
16V
6V
10µF
10V
6V F
16V
0.22µF
16V
L1
10µH
2.2µF
100V
s4
C1
100µF
100V
VIN
F
16V
0.1µF
16V
VBIAS
10V TO 12V
VBIAS
10V TO 12V
D1
SENSE+
SENSE
6V D2
1
2
4
6
7
8
9
3
VCC
GND
TG
BOOST
TINP
BINP
LTC4444
TSBG
+
2.2µF
100V
s8
C2,C3
220µF
63V
s2
VOUT
+
R1
0.025
1W
4444 TA02a
D6
SENSE+
SENSE
D3 D4
R2
0.025
1W
10
10
VOS+
10
TYPICAL APPLICATION
LTC3780 High Efficiency 36V to 72V VIN to 48V/6A Buck-Boost DC/DC Converter
LOAD CURRENT (A)
95
EFFICIENCY (%)
96
97
98
21345
4444 TA02b
6
VIN = 36V
VIN = 48V
VIN = 72V
Efficiency
LTC4444
12
4444fb
PACKAGE DESCRIPTION
MSOP (MS8E) 0910 REV I
0.53 t 0.152
(.021 t .006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.86
(.034)
REF
0.65
(.0256)
BSC
0s – 6s TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
12
34
4.90 t 0.152
(.193 t .006)
8
8
1
BOTTOM VIEW OF
EXPOSED PAD OPTION
765
3.00 t 0.102
(.118 t .004)
(NOTE 3)
3.00 t 0.102
(.118 t .004)
(NOTE 4)
0.52
(.0205)
REF
1.68
(.066)
1.88
(.074)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
1.68 t 0.102
(.066 t .004)
1.88 t 0.102
(.074 t .004) 0.889 t 0.127
(.035 t .005)
RECOMMENDED SOLDER PAD LAYOUT
0.65
(.0256)
BSC
0.42 t 0.038
(.0165 t .0015)
TYP
0.1016 t 0.0508
(.004 t .002)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.05 REF
0.29
REF
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev I)
LTC4444
13
4444fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 06/10 MP-grade part added. Reflected throughout the data sheet. 1 to 14
B 01/11 H-grade part added. Reflected throughout the data sheet. 1 to 14
LTC4444
14
4444fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
LT 0111 REV B • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
LTC3780 High Efficiency 8V to 80V VIN to 12V/5A Buck-Boost DC/DC Converter
PART NUMBER DESCRIPTION COMMENTS
LTC4446 High Voltage Synchronous N-Channel MOSFET
Driver without Shoot-Through Protection
Up to 100V Supply Voltage, 7.2V ≤ VCC ≤ 13.5V, 3A Peak Pull-Up/
0.55Ω Peak Pull-Down
LTC4440/LTC4440-5 High Speed, High Voltage, High Side Gate Driver Up to 80V Supply Voltage, 8V ≤ VCC ≤ 15V, 2.4A Peak Pull-Up/
1.5Ω Peak Pull-Down
LTC4442 High Speed Synchronous N-Channel MOSFET Driver Up to 38V Supply Voltage, 6V ≤ VCC ≤ 9.5V, 3.2A Peak Pull-Up/
4.5A Peak Pull-Down
LTC4449 High Speed Synchronous N-Channel MOSFET Driver Up to 38V Supply Voltage, 4.5V ≤ VCC ≤ 6.5V, 3.2A Peak Pull-Up/
4.5A Peak Pull-Down
LTC4441/LTC4441-1 N-Channel MOSFET Gate Driver Up to 25V Supply Voltage, 5V ≤ VCC ≤ 25V, 6A Peak Output Current
LTC1154 High Side Micropower MOSFET Driver Up to 18V Supply Voltage, 85µA Quiescent Current, H-Grade Available
PGOOD
SS
SENSE+
SENSE
ITH
VOSENSE
SGND
RUN
FCB
PLLFLTR
PLLIN
STBYMD
BOOST1
TG1
SW1
VIN
EXTVCC
INTVCC
BG1
PGND
BG2
SW2
TG2
BOOST2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
LTC3780EG
10k
100
20k
100
VOS+
150k
113k
1% 8.06k
1%
0.01µF
47pF
VIN
D4
0.1µF
100pF
68pF
0.1µF
0.1µF
2.2µF, 100V, TDK C4532X7R2A225MT
100µF, 100V SANYO 100ME 100AX
C1: SANYO 16ME330WF
D1: DIODES INC. BAV19WS
D2: DIODES INC. 1N5819HW-7-F
D3: DIODES INC. B320A-13-F
D4: DIODES INC. MMBZ5230B-7-F
D5: DIODES INC. B1100-13-F
L1: SUMIDA CDEP147-8R0
0.1µF
16V
6V
10µF
10V
TG1
SW1
F
16V
0.22µF
16V
0.22µF
16V
L1 8µH
2.2µF
100V
s5
100µF
100V
s2
VIN
8V TO 80V
F
16V
0.1µF
16V
VBIAS
12V
VBIAS
12V
D1
SENSE+
SENSE
6V D2
6V
1
2
4
TG1
6
7
8
9
3
VCC
GND
TG
BOOST
TINP
BINP
LTC4444
TSBG
+
22µF
16V
s3
C1
330µF
s2
VOUT
12V, 5A
10
VOS+
+
4444 TA03
D5
SENSE+
SENSE
D3
SW1
0.005
1W
10
10