©2002 Fairchild Semiconductor Corporation IRFP240 Rev. B
IRFP240
20A, 200V, 0.180 Ohm, N-Channel Power
MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17422.
Features
• 20A, 200V
•r
DS(ON)
= 0.180
Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC STYLE TO-247
Ordering Information
PART NUMBER PACKAGE BRAND
IRFP240 TO-247 IRFP240
NOTE: When ordering, include the entire part number.
G
D
S
SOURCE
DRAIN
DRAIN
(FLANGE)
GATE
Data Sheet January 2002
©2002 Fairchild Semiconductor Corporation IRFP240 Rev. B
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRFP240 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DS
200 V
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
20 A
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
80 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS
±
20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
D
150 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/
o
C
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E
AS
510 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSS
V
GS
= 0V, I
D
= 250
µ
A (Figure 10) 200 - - V
Gate to Threshold Voltage V
GS(TH)
V
GS
= V
DS
, I
D
= 250
µ
A 2.0 - 4.0 V
Zero-Gate Voltage Drain Current I
DSS
V
DS
= Rated BV
DSS
, V
GS
= 0V - - 25
µ
A
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
J
= 125
o
C - - 250
µ
A
On-State Drain Current (Note 2) I
D(ON)
V
DS
> I
D(ON) x
r
DS(ON)MAX
, V
GS
= 11V (Figure 7) 20 - - A
Gate to Source Leakage I
GSS
V
GS
=
±
20V - -
±
100 nA
Drain to Source On Resistance (Note 2) r
DS(ON)
V
GS
= 10V, I
D
= 10A (Figures 8, 9) - 0.14 0.18
Ω
Forward Transconductance (Note 2) g
fs
V
DS
≥
10V, I
D
= 11A 6.7 11 - S
Turn-On Delay Time t
d(ON)
V
DD
= 100V, I
D
≈
18A, R
GS
= 9.1
Ω
, V
GS
= 10V,
R
L
= 5.4
Ω
MOSFET Switching Times are Essentially
Independent of Operating Temperature
-1421 ns
Rise Time t
r
-5177 ns
Turn-Off Delay Time t
d(OFF)
-4568 ns
Fall Time t
f
-3654 ns
Total Gate Charge
(Gate to Source + Gate to Drain)
Q
g(TOT)
V
GS
= 10V, I
D
= 18A, V
DS
= 0.8 x Rated BV
DSS,
I
G(REF)
= 1.5mA (Figure 14)
Gate Charge is Essentially Independent of
Operating Temperature
-4360nC
Gate to Source Charge Q
gs
-10 - nC
Gate to Drain “Miller” Charge Q
gd
-32 - nC
Input Capacitance C
ISS
V
GS
= 0V, V
DS
= 25V, f = 1.0MHz (Figure 11) - 1275 - pF
Output Capacitance C
OSS
- 500 - pF
Reverse Transfer Capacitance C
RSS
- 160 - pF
Internal Drain Inductance L
D
Measured between the
Contact Screw on
Header that is Closer to
Source and Gate Pins
and Center of Die
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
- 5.0 - nH
Internal Source Inductance L
S
Measured from the
Source Lead, 6mm
(0.25in) from Header to
Source Bonding Pad
- 12.5 - nH
Junction to Case R
θ
JC
- - 0.83
o
C/W
Junction to Ambient R
θ
JA
Free Air Operation - - 30
o
C/W
LS
LD
G
D
S
IRFP240
©2002 Fairchild Semiconductor Corporation IRFP240 Rev. B
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current I
SD
Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode
- - 20 A
Pulse Source to Drain Current (Note 3) I
SDM
- - 80 A
Source to Drain Diode Voltage (Note 2) V
SD
T
J
= 25
o
C, I
SD
= 18A, V
GS
= 0V (Figure 13) - - 2.0 V
Reverse Recovery Time t
rr
T
J
= 25
o
C, I
SD
= 18A, dI
SD
/dt = 100A/
µ
s 120 250 530 ns
Reverse Recovered Charge Q
RR
T
J
= 25
o
C, I
SD
= 18A, dI
SD
/dt = 100A/
µ
s 1.3 2.6 5.6
µ
C
NOTES:
2. Pulse test: pulse width
≤
300
µ
s, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. V
DD
= 50V, starting T
J
= 25
o
C, L = 1.9mH, R
GS
= 50
Ω
, peak I
AS = 20A.
Typical Performance Curves Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
G
D
S
0 50 100 150
0
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
TC, CASE TEMPERATURE (oC)
50 75 10025 150
20
16
12
0
8
ID, DRAIN CURRENT (A)
4
125
ZθJC, NORMALIZED TRANSIENT
1
0.1
10-2
10-2
10-5 10-4 10-3 0.1 1 10
t1, RECTANGULAR PULSE DURATION (s)
10-3
DUTY FACTOR: D = t1/t2
t2
PDM
t1
NOTES:
t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
THERMAL IMPEDANCE
0.02
0.5
0.1
0.2
0.05
0.01
IRFP240
©2002 Fairchild Semiconductor Corporation IRFP240 Rev. B
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves Unless Otherwise Specified (Continued)
100
10
11010
2
0.1
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
103
1000
10µs
100µs
1ms
10ms
TJ = MAX RATED
SINGLE PULSE
TC = 25oCDC
1
OPERATION IN THIS
REGION IS LIMITED
BY rDS(ON)
VDS, DRAIN TO SOURCE VOLTAGE (V)
20 40 60 800 100
30
24
18
0
12
ID, DRAIN CURRENT (A)
VGS = 7V
VGS = 5V
VGS = 6V
VGS = 4V
PULSE DURATION = 80µs
6
VGS = 8V
VGS = 10V
DUTY CYCLE = 0.5% MAX
VDS, DRAIN TO SOURCE VOLTAGE (V)
123405
30
24
18
0
12
ID, DRAIN CURRENT (A)
6
VGS = 10V
VGS = 5V
VGS = 6V
VGS = 4V
VGS = 7V
VGS = 8V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
VGS , GATE TO SOURCE VOLTAGE (V)
100
10
1
0.1 0246810
TJ = 150oCTJ = 25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
60
ID, DRAIN CURRENT (A)
15 30 45075
1.5
1.2
0.9
0
0.6
rDS(ON), DRAIN TO SOURCE
VGS = 20V
0.3
VGS = 10V
ON RESISTANCE (Ω)
PULSE DURATION = 2µs
DUTY CYCLE = 0.5% MAX
0
3.0
1.8
0.6
80-60
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
2.4
1.2
0
60 120
ON RESISTANCE
-20-40 20 40 100 140 160
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
ID = 10A, VGS = 10V
IRFP240
©2002 Fairchild Semiconductor Corporation IRFP240 Rev. B
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves Unless Otherwise Specified (Continued)
1.25
1.05
0.85
60-60
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
1.15
0.95
0.75
-20 20 100
BREAKDOWN
0-40 40 80 120 140
ID = 250µA
160 1 2 10 20 50 100
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
3000
2400
1800
1200
600
05
CRSS
CISS
COSS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
ID, DRAIN CURRENT (A)
6121824030
15
12
9
0
6
gfs, TRANSCONDUCTANCE (S)
3
TJ = 150oC
TJ = 25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
ISD, SOURCE TO DRAIN CURRENT (A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
100
1
0.1 0 0.4 0.8 1.2 1.6 2.0
TJ = 25oC
TJ = 150oC
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
Qg, GATE CHARGE (nC)
12 24 36 48060
4
20
8
VGS , GATE TO SOURCE VOLTAGE (V)
16
VDS = 160V
ID = 18A
VDS = 100V
VDS = 40V
12
0
IRFP240
©2002 Fairchild Semiconductor Corporation IRFP240 Rev. B
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
VGS
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-
VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50kΩ
VDS
S
DUT
D
G
IG(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
IRFP240
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
OPTOLOGIC™
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Quiet Series™
SILENT SWITCHER
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
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MicroPak™
MICROWIRE™
Rev. H4
ACEx™
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EcoSPARK™
E2CMOSTM
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FACT Quiet Series™
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SuperSOT™-6
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STAR*POWER is used under license
VCX™
