
AUIRF4104/S
2 2017-09-22
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
Limited by TJmax , starting TJ = 25°C, L = 0.04mH, RG = 25, IAS = 75A, VGS =10V. Part not recommended for use above this value.
Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
This value determined from sample failure population, TJ = 25°C, L = 0.04mH, RG = 25, IAS = 75A, VGS =10V.
This is applied to D2Pak When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and
soldering techniques refer to application note #AN-994
R
is measured at TJ of approximately 90°C
This is only applied to TO-220AB package.
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 75A.
Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements.
(Refer to AN-1140)
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.032 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 4.3 5.5 m VGS = 10V, ID = 75A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Trans conductance 63 ––– ––– S VDS = 10V, ID = 75A
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS =40V, VGS = 0V
––– ––– 250 VDS = 40V,VGS = 0V,TJ =125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg Total Gate Charge ––– 68 100
nC
ID = 75A
Qgs Gate-to-Source Charge ––– 21 ––– VDS = 32V
Qgd Gate-to-Drain Charge ––– 27 ––– VGS = 10V
td(on) Turn-On Delay Time ––– 16 –––
ns
VDD = 20V
tr Rise Time ––– 130 ––– ID = 75A
td(off) Turn-Off Delay Time ––– 38 ––– RG= 6.8
tf Fall Time ––– 77 ––– VGS = 10V
LD Internal Drain Inductance ––– 4.5 –––
nH
Between lead,
6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
Ciss Input Capacitance ––– 3000 –––
pF
VGS = 0V
Coss Output Capacitance ––– 660 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 380 ––– ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 2160 ––– VGS = 0V, VDS = 1.0V ƒ = 1.0MHz
Coss Output Capacitance ––– 560 ––– VGS = 0V, VDS = 32V ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 850 ––– VGS = 0V, VDS = 0V to 32V
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 75
A
MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– 470 integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C,IS = 75A,VGS = 0V
trr Reverse Recovery Time ––– 23 35 ns TJ = 25°C ,IF = 75A, VDD = 20V
Qrr Reverse Recovery Charge ––– 6.8 10 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)