General Description
The MAX1951/MAX1952 high-efficiency, DC-to-DC
step-down switching regulators deliver up to 2A of out-
put current. The devices operate from an input voltage
range of 2.6V to 5.5V and provide an output voltage
from 0.8V to VIN, making the MAX1951/MAX1952 ideal
for on-board postregulation applications. The MAX1951
total output error is less than 1% over load, line, and
temperature.
The MAX1951/MAX1952 operate at a fixed frequency of
1MHz with an efficiency of up to 94%. The high operating
frequency minimizes the size of external components.
Internal soft-start control circuitry reduces inrush current.
Short-circuit and thermal-overload protection improve
design reliability.
The MAX1951 provides an adjustable output from 0.8V
to VIN, whereas the MAX1952 has a preset output of
1.8V. Both devices are available in a space-saving 8-pin
SO package.
Applications
ASIC/DSP/µP/FPGA Core and I/O Voltages
Set-Top Boxes
Cellular Base Stations
Networking and Telecommunications
Features
Compact 0.385in2Circuit Footprint
10µF Ceramic Input and Output Capacitors, 2µH
Inductor for 1.5A Output
Efficiency Up to 94%
1% Output Accuracy Over Load, Line, and
Temperature (MAX1951, Up to 1.5A)
Guaranteed 2A Output Current
Operate from 2.6V to 5.5V Supply
Adjustable Output from 0.8V to VIN (MAX1951)
Preset Output of 1.8V (1.5% Accuracy) (MAX1952)
Internal Digital Soft-Soft
Short-Circuit and Thermal-Overload Protection
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
________________________________________________________________ Maxim Integrated Products 1
Ordering Information/
Selector Guide
19-2622; Rev 2; 6/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-
PACKAGE OUTPUT
MAX1951ESA+ -40°C to +85°C 8 SO Adj 0.8V to VIN
MAX1952ESA+ -40°C to +85°C 8 SO Fixed 1.8V
MAX1951
IN
OFF
ON
LX
COMP
OUTPUT
0.8V TO VIN, UP TO 2A
INPUT
2.6V TO 5.5V
REF
FB
PGND GND
VCC
OPTIONAL
Typical Operating Circuit
Pin Configuration
PGND
COMPFB
1
2
8
7
IN
LXREF
GND
VCC
SO
TOP VIEW
3
4
6
5
MAX1951
MAX1952
+Denotes a lead(Pb)-free/RoHS-compliant package.
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VIN = VCC = 3.3V, PGND = GND, FB in regulation, CREF = 0.1µF, TA= 0°C to +85°C, unless otherwise noted. Typical values are at
TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETER CONDITIONS MIN TYP MAX UNITS
IN AND VCC
IN Voltage Range 2.6 5.5 V
Supply Current S w i tchi ng w i th no l oad , LX unconnected VIN = 5.5V 6 10 mA
Shutdown Current COMP = GND 0.5 1.0 mA
VCC rising 2.35 2.5
VCC Undervoltage Lockout
Threshold When LX starts/stops switching VCC falling 2 2.25 V
REF
REF Voltage IREF = 0µA, VIN = 2.6V to 5.5V 1.96 2 2.03 V
REF Load Regulation IREF = 0 to 40µA, VIN = 2.6V to 5.5V 0.01 0.2 %
REF Line Regulation IREF = 20µA, VIN = 2.6V to 5.5V 0.01 0.4 %
REF Shutdown Resistance From REF to GND, COMP = GND 12 22 Ω
COMP
MAX1951 40 60 80
COMP Transconductance From FB to COMP, VCOMP = 1.25V MAX1952 26.7 40 53.3 µS
COMP Clamp Voltage, Low VIN = 2.6V to 5.5V, VFB = 1.3V 0.6 1 1.2 V
COMP Clamp Voltage, High VIN = 2.6V to 5.5V, VFB = 1.1V 1.97 2.15 2.28 V
COMP Shutdown Resistance From COMP to GND, VIN = 2V 15 30 Ω
COMP rising 0.6 1
COMP Shutdown Threshold When LX starts/stops switching COMP falling 0.17 0.4 V
COMP Startup Current COMP = GND 15 25 40 µA
FB
Output Voltage Range
(MAX1951) When using external feedback resistors to drive FB 0.8 VIN V
VIN = 2.6V to 5.5V MAX1951 0.787 0.795 0.803
FB Regulation Voltage
(Error Amp Only)
V
C OM P
= 1V to 2V ,
IOU T
= 0 to 1.5A VIN = 2.8V to 5.5V MAX1952 1.773 1.8 1.827 V
FB Input Resistance MAX1952 13 18 28 kΩ
FB Input Bias Current MAX1951 -0.1 +0.1 µA
IN, VCC to GND ........................................................-0.3V to +6V
COMP, FB, REF to GND.............................-0.3V to (VCC + 0.3V)
LX to Current (Note 1).........................................................±4.5A
PGND to GND .............................................Internally Connected
Continuous Power Dissipation (TA = +85°C)
8-Pin SO (derate 12.2mW/°C above +70°C)................976mW
Package Junction-to-Ambient
Thermal Resistance (θJA) (Note 2)...............................82°C/W
Package Junction-to-Case
Thermal Resistance (θJC) (Note 2) ..............................32°C/W
Operating Temperature Range
MAX195_ ESA..................................................-40°C to +85°C
Junction Temperature Range ............................-40°C to +150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceed
the IC’s package power dissipation limits.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = 3.3V, PGND = GND, FB in regulation, CREF = 0.1µF, TA= 0°C to +85°C, unless otherwise noted. Typical values are at
TA= +25°C.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
LX
VIN = 5V 116
VIN = 3.3V 140 266
LX On-Resistance, PMOS
VIN = 2.6V 163
mΩ
VIN = 5V 93
VIN = 3.3V 106 206LX On-Resistance, NMOS
VIN = 2.6V 116
mΩ
LX Current-Sense
Transimpedance From LX to COMP, VIN = 2.6V to 5.5V 0.16 0.24 0.35 Ω
High side 2.4 3.1 4.5
LX Current-Limit Threshold Duty cycle = 100%, VIN = 2.6V to 5.5V Low side -0.6 A
VLX = 5.5V 10
LX Leakage Current VIN = 5.5V LX = GND -10 µA
LX Switching Frequency VIN = 2.6V to 5.5V 0.85 1 1.1 MHz
LX Maximum Duty Cycle VCOMP = 1.5V, LX = Hi-Z, VIN = 2.6V to 5.5V 100 %
LX Minimum Duty Cycle VCOMP = 1V, VIN = 2.6V to 5.5V 15 %
THERMAL CHARACTERISTICS
TJ rising 160
Thermal-Shutdown Threshold When LX starts/stops switching TJ falling 145 °C
ELECTRICAL CHARACTERISTICS
(VIN = VCC = 3.3V, PGND = GND, FB in regulation, CREF = 0.1µF, TA= -40°C to +85°C, unless otherwise noted.) (Note 3)
PARAMETER CONDITIONS MIN TYP MAX UNITS
IN AND VCC
IN Voltage Range 2.6 5.5 V
Supply Current Switching with no load, VIN = 5.5V 10 mA
Shutdown Current COMP = GND 1 mA
VCC rising 2.5
VCC Undervoltage Lockout
Threshold When LX starts/stops switching VCC falling 1.95 V
REF
REF Voltage IREF = 0µA, VIN = 2.6V to 5.5V 1.95 2.03 V
REF Load Regulation IREF = 0 to 40µA, VIN = 2.6V to 5.5V 0.2 %
REF Line Regulation IREF = 20µA, VIN = 2.6V to 5.5V 0.4 %
REF Shutdown Resistance From REF to GND, COMP = GND 22 Ω
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
4 _______________________________________________________________________________________
Note 3: Specifications to -40°C are guaranteed by design and not production tested.
Note 4: The LX output is designed to provide 2.4A RMS current.
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = 3.3V, PGND = GND, FB in regulation, CREF = 0.1µF, TA= -40°C to +85°C, unless otherwise noted.) (Note 3)
PARAMETER CONDITIONS MIN TYP MAX UNITS
COMP
MAX1951 40 80
COMP Transconductance From FB to COMP, VCOMP = 1.25V MAX1952 26.7 53.3 µS
COMP Clamp Voltage, Low VIN = 2.6V to 5.5V, VFB = 1.3V 0.6 1.2 V
COMP Clamp Voltage, High VIN = 2.6V to 5.5V, VFB = 1.1V 1.97 2.28 V
COMP Shutdown Resistance From COMP to GND, VIN = 2V 30 Ω
COMP rising 1.2
COMP Shutdown Threshold When LX starts/stops switching COMP falling 0.17 V
COMP Startup Current COMP = GND 14 40 µA
FB
Output Voltage Range
(MAX1951) When using external feedback resistors to drive FB 0.8 VIN V
MAX1951 0.783 0.807
FB Regulation Voltage
(Error Amp Only) VCOMP = 1V to 2V, VIN = 2.6V to 5.5V MAX1952 1.764 1.836 V
FB Input Resistance From FB to GND MAX1952 10 30 kΩ
FB Input Bias Current MAX1951 -0.1 +0.1 µA
LX (Note 4)
LX On-Resistance, PMOS 266 mΩ
LX On-Resistance, NMOS 206 mΩ
LX Current Sense From LX to COMP, VIN = 2.6V to 5.5V 0.16 0.35 Ω
LX Current-Limit Threshold Duty cycle = 100%, VIN = 2.6V to 5.5V, high side 2.4 4.5 A
VLX = 5.5V 10
LX Leakage Current VIN = 5.5V LX = GND -10 µA
LX Switching Frequency VIN = 2.6V to 5.5V 0.8 1.1 MHz
LX Maximum Duty Cycle VCOMP = 1.5V, LX = Hi-Z, VIN = 2.6V to 5.5V 100 %
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
_______________________________________________________________________________________ 5
EFFICIENCY vs. LOAD CURRENT
(VCC = VIN = 5V)
MAX 1951 toc01
LOAD CURRENT (mA)
EFFICIENCY (%)
1000100
10
20
30
40
50
60
70
80
90
100
0
10 10,000
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.5V
VOUT = 0.8V
EFFICIENCY vs. LOAD CURRENT
(VCC = VIN = 3.3V)
MAX 1951 toc02
LOAD CURRENT (mA)
EFFICIENCY (%)
1000100
10
20
30
40
50
60
70
80
90
100
0
10 10,000
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 0.8V
REF VOLTAGE
vs. REF OUTPUT CURRENT
MAX1951 toc03
REF OUTPUT CURRENT (μA)
REF VOLTAGE (V)
3530252015105
1.990
1.991
1.992
1.993
1.994
1.995
1.989
040
TA = +85°CTA = +25°C
TA = -40°C
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
MAX1951 toc04
INPUT VOLTAGE (V)
SWITCHING FREQUENCY (MHz)
5.14.63.1 3.6 4.1
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
0.80
2.6 5.6
TA = +85°C
TA = +25°C
TA = -40°C
OUTPUT VOLTAGE DEVIATION
vs. LOAD CURRENT
MAX1951 toc05
LOAD CURRENT (A)
OUTPUT VOLTAGE DEVIATION (mV)
1.20.80.4
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
-6
01.6
VOUT = 2.5V VOUT = 3.3V
VOUT = 0.8V VOUT = 1.8V
Typical Operating Characteristics
(Typical values are at VIN = VCC = 5V, VOUT = 1.5V, IOUT = 1.5A, and TA= +25°C, unless otherwise noted. See Figure 2.)
LOAD-TRANSIENT RESPONSE
MAX1951 toc06
40μs/div
0A
OUTPUT VOLTAGE:
100mV/div,
AC-COUPLED
OUTPUT CURRENT:
0.5A/div
VIN = 5V
VOUT = 2.5V
IOUT = 0.5 TO 1A
LOAD-TRANSIENT RESPONSE
MAX1951 toc07
40μs/div
0A
OUTPUT VOLTAGE:
100mV/div,
AC-COUPLED
OUTPUT CURRENT:
0.5A/div
VIN = 3.3V
VOUT = 1.5V
IOUT = 0.5 TO 1A
MAX1951/MAX1952
1MHz, All Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Typical values are at VIN = VCC = 5V, VOUT = 1.5V, IOUT = 1.5A, and TA= +25°C, unless otherwise noted. See Figure 2.)
SHUTDOWN CURRENT
vs. INPUT VOLTAGE
MAX1951 toc12
INPUT VOLTAGE (V)
SHUTDOWN CURRENT (mA)
5.04.54.03.53.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0
2.5 5.5
SWITCHING WAVEFORMS
MAX1951 toc08
200ns/div
0V
0A
INDUCTOR CURRENT
1A/div
VLX
5V/div
OUTPUT VOLTAGE
10mV/div,
AC-COUPLED
VIN = 3.3V
VOUT = 1.8V
ILOAD = 1.5A
SOFT-START WAVEFORMS
MAX1951 toc09
1ms/div
VCOMP
2V/div
OUTPUT VOLTAGE
1V/div
VIN = VCC = 3.3V
VOUT = 2.5V
ILOAD = 1.5A
SOFT-START WAVEFORMS
MAX1951 toc10
1ms/div
VCOMP
2V/div
OUTPUT VOLTAGE
0.5V/div
VIN = VCC = 3.3V
VOUT = 0.8V
SHUTDOWN WAVEFORMS
MAX1951 toc11
20μs/div
0V
0V
0V VCOMP
2V/div
VLX
5V/div
OUTPUT VOLTAGE
1V/div
VIN = VCC = 3.3V
VOUT = 2.5V
ILOAD = 1.5A
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
_______________________________________________________________________________________ 7
Detailed Description
The MAX1951/MAX1952 high-efficiency switching regula-
tors are small, simple, DC-to-DC step-down converters
capable of delivering up to 2A of output current. The
devices operate in pulse-width modulation (PWM) at a
fixed frequency of 1MHz from a 2.6V to 5.5V input voltage
and provide an output voltage from 0.8V to VIN, making
the MAX1951/MAX1952 ideal for on-board postregula-
tion applications. The high switching frequency allows
for the use of smaller external components, and internal
synchronous rectifiers improve efficiency and eliminate
the typical Schottky free-wheeling diode. Using the on-
resistance of the internal high-side MOSFET to sense
switching currents eliminates current-sense resistors,
further improving efficiency and cost. The MAX1951
total output error over load, line, and temperature (0°C
to +85°C) is less than 1%.
Controller Block Function
The MAX1951/MAX1952 step-down converters use a
PWM current-mode control scheme. An open-loop com-
parator compares the integrated voltage-feedback signal
against the sum of the amplified current-sense signal and
the slope compensation ramp. At each rising edge of the
internal clock, the internal high-side MOSFET turns on
until the PWM comparator trips. During this on-time, cur-
rent ramps up through the inductor, sourcing current to
the output and storing energy in the inductor. The current-
mode feedback system regulates the peak inductor cur-
rent as a function of the output voltage error signal. Since
the average inductor current is nearly the same as the
peak inductor current (<30% ripple current), the circuit
acts as a switch-mode transconductance amplifier. To
preserve inner-loop stability and eliminate inductor stair-
casing, a slope-compensation ramp is summed into the
main PWM comparator. During the second half of the
cycle, the internal high-side p-channel MOSFET turns off,
and the internal low-side n-channel MOSFET turns on.
The inductor releases the stored energy as its current
ramps down while still providing current to the output. The
output capacitor stores charge when the inductor current
exceeds the load current, and discharges when the
inductor current is lower, smoothing the voltage across
the load. Under overload conditions, when the inductor
current exceeds the current limit (see the Current Limit
section), the high-side MOSFET does not turn on at the
rising edge of the clock and the low-side MOSFET
remains on to let the inductor current ramp down.
Current Sense
An internal current-sense amplifier produces a current
signal proportional to the voltage generated by the
high-side MOSFET on-resistance and the inductor cur-
rent (RDS(ON) x ILX). The amplified current-sense signal
and the internal slope compensation signal are
summed together into the comparator’s inverting input.
The PWM comparator turns off the internal high-side
MOSFET when this sum exceeds the output from the
voltage-error amplifier.
Current Limit
The internal high-side MOSFET has a current limit of 3.1A
(typ). If the current flowing out of LX exceeds this limit,
the high-side MOSFET turns off and the synchronous
rectifier turns on. This lowers the duty cycle and causes
the output voltage to droop until the current limit is no
longer exceeded. A synchronous rectifier current limit of
-0.6A (typ) protects the device from current flowing into
LX. If the negative current limit is exceeded, the synchro-
nous rectifier turns off, forcing the inductor current to flow
Pin Description
PIN NAME FUNCTION
1V
CC Supply Voltage. Bypass VCC with 0.1µF
capacitor to ground and 10Ω resistor to IN.
2 REF Reference Bypass. Bypass REF with 0.1µF
capacitor to ground.
3 GND Ground
4FB
Feedback Input. Connect FB to the output to
regulate using the internal feedback resistor
string (MAX1952). Connect an external resistor-
divider from the output to FB and GND to set
the output to a voltage between 0.8V and VIN
(MAX1951).
5 COMP
Regulator Compensation. Connect series RC
network from COMP to GND. Pull COMP below
0.17V to shut down the regulator. COMP =
GND when VIN is less than 2.25V (see the
Compensation and Shutdown Mode section)
6 PGND
Power Ground. Internally connected to GND.
Keep power ground and signal ground planes
separate.
7LX
Inductor Connection. Connect an inductor
between LX and the regulator output.
8IN
Power-Supply Voltage. Input voltage range
from 2.6V to 5.5V. Bypass IN with a 10µF (min)
ceramic capacitor to GND and a 10Ω resistor
to VCC.
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
8 _______________________________________________________________________________________
through the high-side MOSFET body diode, back to the
input, until the beginning of the next cycle or until the
inductor current drops to zero. The MAX1951/MAX1952
utilize a pulse-skip mode to prevent overheating during
short-circuit output conditions. The device enters pulse-
skip mode when the FB voltage drops below 300mV, lim-
iting the current to 3A (typ) and reducing power
dissipation. Normal operation resumes upon removal of
the short-circuit condition.
VCC Decoupling
Due to the high switching frequency and tight output
tolerance (1%), decouple VCC with a 0.1µF capacitor
connected from VCC to GND, and a 10Ωresistor con-
nected from VCC to IN. Place the capacitor as close to
VCC as possible.
Soft-Start
The MAX1951/MAX1952 employ digital soft-start circuitry
to reduce supply inrush current during startup conditions.
When the device exits undervoltage lockout (UVLO), shut-
down mode, or restarts following a thermal-overload
event, or the external pulldown on COMP is released, the
digital soft-start circuitry slowly ramps up the voltages at
REF and FB (see the Soft-Start Waveforms in the Typical
Operating Characteristics).
Undervoltage Lockout
If VCC drops below 2.25V, the UVLO circuit inhibits
switching. Once VCC rises above 2.35V, the UVLO
clears, and the soft-start sequence activates.
Compensation
and Shutdown Mode
The output of the internal transconductance voltage
error amplifier connects to COMP. The normal operation
voltage for COMP is 1V to 2.2V. To shut down the
MAX1951/MAX1952, use an NPN bipolar junction
transistor or a very low output capacitance open-drain
MOSFET to pull COMP to GND. Shutdown mode causes
the internal MOSFETs to stop switching, forces LX to a
high-impedance state, and shorts REF to GND.
Release COMP to exit shutdown and initiate the soft-
start sequence.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation
in the device. When the junction temperature exceeds TJ
= +160°C, a thermal sensor forces the device into shut-
down, allowing the die to cool. The thermal sensor turns
the device on again after the junction temperature cools
by 15°C, resulting in a pulsed output during continuous
overload conditions. Following a thermal-shutdown condi-
tion, the soft-start sequence begins.
MAX1951
VCC
COMP
CURRENT SENSE
SLOPE
COMP
ERROR
SIGNAL
CLOCK
POSITIVE AND NEGATIVE CURRENT LIMITS
GND
REF
FB
PGND
LX
IN
DAC
gm
SOFT-START/
UVLO
REF
2V
PWM
CONTROL
THERMAL
SHUTDOWN
BANDGAP
REF
1.25V
CLAMP
OSC
RAMP GEN
Figure 1. Functional Diagram
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
_______________________________________________________________________________________ 9
Design Procedure
Output Voltage Selection: Adjustable
(MAX1951) or Preset (MAX1952)
The MAX1951 provides an adjustable output voltage
between 0.8V and VIN. Connect FB to output for 0.8V
output. To set the output voltage of the MAX1951 to a
voltage greater than VFB (0.8V typ), connect the output
to FB and GND using a resistive divider, as shown in
Figure 2a. Choose R2 between 2kΩand 20kΩ, and set
R3 according to the following equation:
R3 = R2 x [(VOUT/VFB) – 1]
The MAX1951 PWM circuitry is capable of a stable min-
imum duty cycle of 18%. This limits the minimum output
voltage that can be generated to 0.18 VIN. Instability
may result for VIN/VOUT ratios below 0.18.
The MAX1952 provides a preset output voltage.
Connect the output to FB, as shown in Figure 2b.
Output Inductor Design
Use a 2µH inductor with a minimum 2A-rated DC cur-
rent for most applications. For best efficiency, use an
inductor with a DC resistance of less than 20mΩand a
saturation current greater than 3A (min). See Table 2
for recommended inductors and manufacturers. For
most designs, derive a reasonable inductor value
(LINIT) from the following equation:
LINIT = VOUT x (VIN - VOUT)/(VIN x LIR x IOUT(MAX) x fSW)
where fSW is the switching frequency (1MHz typ) of the
oscillator. Keep the inductor current ripple percentage
LIR between 20% and 40% of the maximum load cur-
rent for the best compromise of cost, size, and perfor-
mance. Calculate the maximum inductor current as:
IL(MAX) = (1 + LIR/2) x IOUT(MAX)
Check the final values of the inductor with the output
ripple voltage requirement. The output ripple voltage is
given by:
VRIPPLE = VOUT x (VIN - VOUT) x ESR / (VIN x LFINAL x fSW)
where ESR is the equivalent series resistance of the
output capacitors.
Input Capacitor Design
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor must meet the ripple current
requirement (IRMS) imposed by the switching currents
defined by the following equation:
For duty ratios less than 0.5, the input capacitor RMS
current is higher than the calculated current. Therefore,
use a +20% margin when calculating the RMS current
at lower duty cycles. Use ceramic capacitors for their
low ESR, equivalent series inductance (ESL), and lower
cost. Choose a capacitor that exhibits less than 10°C
temperature rise at the maximum operating RMS cur-
rent for optimum long-term reliability.
After determining the input capacitor, check the input
ripple voltage due to capacitor discharge when the
high-side MOSFET turns on. Calculate the input ripple
voltage as follows:
VIN_RIPPLE = (IOUT x VOUT)/(fSW x VIN x CIN)
Keep the input ripple voltage less than 3% of the input
voltage.
Output Capacitor Design
The key selection parameters for the output capacitor
are capacitance, ESR, ESL, and the voltage rating
requirements. These affect the overall stability, output
ripple voltage, and transient response of the DC-to-DC
converter. The output ripple occurs due to variations in
the charge stored in the output capacitor, the voltage
drop due to the capacitor’s ESR, and the voltage drop
due to the capacitor’s ESL. Calculate the output voltage
ripple due to the output capacitance, ESR, and ESL as:
VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL)
where the output ripple due to output capacitance,
ESR, and ESL is:
VRIPPLE(C) = IP-P/(8 x COUT x fSW)
VRIPPLE(ESR) = IP-P x ESR
VRIPPLE(ESL) = (IP-P/tON) x ESL or (IP-P/tOFF) x ESL,
whichever is greater
and IP-P the peak-to-peak inductor current is:
IP-P = [ (VIN - VOUT )/fSW x L) ] x VOUT/VIN
Use these equations for initial capacitor selection, but
determine final values by testing a prototype or evalua-
tion circuit. As a rule, a smaller ripple current results in
less output voltage ripple. Since the inductor ripple
current is a factor of the inductor value, the output
voltage ripple decreases with larger inductance. Use
ceramic capacitors for their low ESR and ESL at the
switching frequency of the converter. The low ESL of
ceramic capacitors makes ripple voltages negligible.
Load transient response depends on the selected
output capacitor. During a load transient, the output
instantly changes by ESR x ILOAD. Before the controller
can respond, the output deviates further, depending on
the inductor and output capacitor values. After a short
time (see the Load Transient Response graph in the
IVIVVV
RMS IN OUT OUT IN OUT
××(/ ) ( ( ))12
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
10 ______________________________________________________________________________________
Typical Operating Characteristics), the controller
responds by regulating the output voltage back to its
nominal state. The controller response time depends on
the closed-loop bandwidth. A higher bandwidth yields
a faster response time, thus preventing the output from
deviating further from its regulating value.
Compensation Design
The double pole formed by the inductor and output
capacitor of most voltage-mode controllers introduces a
large phase shift, that requires an elaborate compensa-
tion network to stabilize the control loop. The MAX1951/
MAX1952 utilize a current-mode control scheme that reg-
ulates the output voltage by forcing the required current
through the external inductor, eliminating the double pole
caused by the inductor and output capacitor, and greatly
simplifying the compensation network. A simple type 1
compensation with single compensation resistor (R1) and
compensation capacitor (C2) creates a stable and high-
bandwidth loop.
An internal transconductance error amplifier compen-
sates the control loop. Connect a series resistor and
capacitor between COMP (the output of the error ampli-
fier) and GND to form a pole-zero pair. The external
inductor, internal current-sensing circuitry, output
capacitor, and the external compensation circuit deter-
mine the loop system stability. Choose the inductor and
output capacitor based on performance, size, and cost.
Additionally, select the compensation resistor and
capacitor to optimize control-loop stability. The compo-
nent values shown in the typical application circuit
(Figure 2) yield stable operation over a broad range of
input-to-output voltages.
The basic regulator loop consists of a power modulator,
an output feedback divider, and an error amplifier. The
power modulator has DC gain set by gmc x RLOAD,
with a pole-zero pair set by RLOAD, the output capaci-
tor (COUT), and its ESR. The following equations define
the power modulator:
Modulator gain:
GMOD = ΔVOUT/ΔVCOMP = gmc x RLOAD
Modulator pole frequency:
fpMOD = 1 / (2 x πx COUT x (RLOAD+ESR))
Modulator zero frequency:
fzESR = 1 /(2 x πx COUT x ESR)
where, RLOAD = VOUT/IOUT(MAX), and gmc = 4.2S.
The feedback divider has a gain of GFB = VFB / VOUT,
where VFB is equal to 0.8V. The transconductance error
amplifier has a DC gain, GEA(DC), of 70dB. The com-
pensation capacitor, C2, and the output resistance of
the error amplifier, ROEA (20MΩ), set the dominant
pole. C2and R1 set a compensation zero. Calculate the
dominant pole frequency as:
fpEA = 1/(2πx CC x ROEA)
Determine the compensation zero frequency is:
fzEA = 1/(2πx CC x RC)
For best stability and response performance, set the
closed-loop unity-gain frequency much higher than the
modulator pole frequency. In addition, set the closed-
loop crossover unity-gain frequency less than, or equal
to, 1/5 of the switching frequency. However, set the
maximum zero crossing frequency to less than 1/3 of
the zero frequency set by the output capacitance and
its ESR when using POSCAP, SPCAP, OSCON, or other
electrolytic capacitors.The loop-gain equation at the
unity-gain frequency is:
GEA(fc) x GMOD(fc) x VFB/VOUT = 1
where GEA(fc)= gmEA x R1, and GMOD(fc) = gmc x
RLOAD x fpMOD/fC, where gmEA = 60µS.
R1calculated as:
R1= VOUT x K/(gmEA x VFB x GMOD(fc))
where K is the correction factor due to the extra phase
introduced by the current loop at high frequencies
(>100kHz). K is related to the value of the output
capacitance (see Table 1 for values of K vs. C). Set the
error-amplifier compensation zero formed by R1and C2
at the modulator pole frequency at maximum load. C2
is calculated as follows:
C2= (VOUT x COUT/(R1 x IOUT(MAX))
As the load current decreases, the modulator pole also
decreases; however, the modulator gain increases
accordingly, resulting in a constant closed-loop unity-
gain frequency. Use the following numerical example to
calculate R1and C2values of the typical application
circuit of Figure 2a.
Table 1. K Value
VOUT = 1.5V
IOUT(MAX) = 1.5A
COUT = 10µF
RESR = 0.010Ω
gmEA = 60µS
DESCRIPTION
COUT (µF) K
10 0.55
22 0.47
V al ues ar e for outp ut i nd uctance fr om 1.2µH
to 2.H . D o not use outp ut i nd uctor s l ar g er
than 2.2µH . U se fC
= 200kH z to cal cul ate R1
.
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
______________________________________________________________________________________ 11
gmc = 4.2S
fSWITCH = 1MHz
RLOAD = VOUT/IOUT(MAX) = 1.5V/1.5 A = 1Ω
fpMOD = [1/(2πx COUT x (RLOAD + RESR)]
= [1/(2 x π×10 ×10-6 x (1 + 0.01)] = 15.76kHz.
fzESR = [1/(2πxCOUT RESR)]
= [1/(2 x π×10 ×10-6 ×0.01)] = 1.59MHz.
For 2µH output inductor, pick the closed-loop unity-gain
crossover frequency (fC) at 200kHz. Determine the
power modulator gain at fC:
GMOD(fc)= gmc ×RLOAD ×fpMOD/fC= 4.2 ×1 ×
15.76kHz/200kHz = 0.33
then:
R1= VO x K/(gmEA x VFB x GMOD(fc)) = (1.5 x 0.55)/
(60 ×10-6 ×0.8 ×0.33) 51.1kΩ(1%)
C2= (VOUT ×COUT)/(R ×IOUT(max) )
= (1.5 × 10 × 10-6)/(51.1k ×1.5)
196pF, choose 220pF, 10%
Applications Information
PCB Layout Considerations
Careful PCB layout is critical to achieve clean and sta-
ble operation. The switching power stage requires par-
ticular attention. Follow these guidelines for good PCB
layout:
1) Place decoupling capacitors as close to the IC as
possible. Keep power ground plane (connected to
PGND) and signal ground plane (connected to
GND) separate.
2) Connect input and output capacitors to the power
ground plane; connect all other capacitors to the
signal ground plane.
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching current (C1 to IN
and C1 to PGND) short. Avoid vias in the switching
paths.
4) If possible, connect IN, LX, and PGND separately to
a large copper area to help cool the IC to further
improve efficiency and long-term reliability.
5) Ensure all feedback connections are short and
direct. Place the feedback resistors as close to the
IC as possible.
6) Route high-speed switching nodes away from sensi-
tive analog areas (FB, COMP).
Thermal Considerations
The MAX1951 uses a fused-lead 8-pin SO package with
a RTHJC rating of 32°C/W. The MAX1951 EV kit layout is
optimized for 1.5A. The typical application circuit shown
in Figure 2c was tested with the existing MAX1951 EV kit
layout at +85°C ambient temperature, and GND lead
temperature was measured at +113°C for a typical
device. The estimated junction temperature was
+138°C. Thermal performance can be further improved
with one of the following options:
1) Increase the copper areas connected to GND, LX,
and IN.
2) Provide thermal vias next to GND and IN, to the
ground plane and power plane on the back side of
PCB, with openings in the solder mask next to the
vias to provide better thermal conduction.
3) Provide forced-air cooling to further reduce case
temperature.
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
12 ______________________________________________________________________________________
MAX1951ESA
IN
OFF
R1
51.1kΩ
R4
10Ω
R5
10kΩ
C5
0.1μF
C2
220pF
C3
0.1μF
R2
16.9kΩ
1%
R3
14.7kΩ
1%
L1
2μH
C4
10μF
C1
10μF
ON
LX
COMP
1.5V AT 1.5A
2.6V TO 5.5V
REF
FB
GND
Q1
PGND
GND
V
CC
OPTIONAL
SHUTDOWN
CONTROL
COMPONENT VALUES
OUTPUT
VOLTAGE (V)
0.8
1.5
2.5
3.3
R1 (kΩ)
33.2
51.1
82.5
110
R2 (kΩ)
OPEN
16.9
14
24
R3 (kΩ)
SHORT
14.7
30
75
C2 (pF)
220
220
220
220
Figure 2a. MAX1951 Adjustable Output Typical Application Circuit
MAX1952ESA-18
IN
OFF
R1
68kΩ
R4
10Ω
R5
10kΩ
C5
0.1μF
C2
220pF
C3
0.1μF
L1
2μH
C4
10μF
C1
10μF
ON
LX
COMP
1.8V AT 1.5A
2.6V TO 5.5V
REF
FB
PGND
Q1
GND
GND
VCC
OPTIONAL
SHUTDOWN
CONTROL
Figure 2b. MAX1952 Fixed-Output Typical Application Circuit
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
______________________________________________________________________________________ 13
MAX1951ESA
IN
OFF
R1
100kΩ
R4
10Ω
R5
10kΩ
C5
0.1μF
C2
100pF
C3
0.1μF
L1
1.1μH
C4
22μF
C1
10μF
ON
LX
COMP
1.8V, 2A
3.3V ±5%
REF
FB
GND
Q1
PGND
GND
VCC
OPTIONAL
SHUTDOWN
CONTROL
L1: TOKO A915AY-1R1M
C1: TAIYO YUDEN JMK316BJ106ML
C4: TAIYO YUDEN JMK325BJ226MM
R2
10kΩ
1%
R3
12.7kΩ
1%
Figure 2c. MAX1951 Typical Application Circuit with 2A Output
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
14 ______________________________________________________________________________________
Table 2. External Components List
C O M PO N EN T ( F I G U R E 2 ) FUNCTION DESCRIPTION
L1 Output inductor
2µH ±20% inductor
Sumida CDRH4D28-1R8 or
Toko A915AY-2R0M
C1 Input filtering capacitor
10µF ±20%, 6.3V X5R capacitor
Taiyo Yuden JMK316BJ106ML or
TDK C3216X5R0J106MT
C2 Compensation capacitor
220pF ±10%, 50V capacitor
Murata GRM39X7R221K050AD or
Taiyo Yuden UMK107CH221KZ
C3 Reference bypass capacitor
0.1µF ±20%, 16V X7R capacitor
Taiyo Yuden EMK107BJ104MA,
TDK C1608X7R1C104K, or
Murata GRM 39X7R104K016AD
C4 Output filtering capacitor
10µF ±20%, 6.3V X5R capacitor
Taiyo Yuden JMK316BJ106ML or
TDK C3216X5R0J106MT
C5 VCC bypass capacitor
0.1µF ±20%, 16V X7R capacitor
Taiyo Yuden EMK107BJ104MA,
TDK C1608X7R1C104K, or
Murata GRM 39X7R104K016AD
R1 Loop compensation resistor Figure 2a
R2 Feedback resistor Figure 2a
R3 Feedback resistor Figure 2a
R4 Bypass resistor 10Ω ±5% resistor
R5 S hutd ow n tr ansi stor b ase cur r ent b i as ( op ti onal ) 10kΩ ±5% resistor
Q1 Shutdown transistor (optional)
NPN bipolar junction transistor
Fairchild MMBT3904
Zetex FMMT413
Table 3. Component Suppliers
MANUFACTURER PHONE FAX
Murata 650-964-6321 650-964-8165
Sumida 847-545-6700 847-545-6720
Taiyo Yuden 800-348-2496 847-925-0899
TDK 847-803-6100 847-803-6296
Toko 1-800-PIK-TOKO 408-943-9790
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
8 SO S8-F6 21-0041
MAX1951/MAX1952
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 10/02 Initial release
1 8/03 Updated data sheet title, Features, Typical Operating Circuit, Detailed Description
and added Thermal Considerations section. 1–15
2 6/09 Revised Ordering Information, Electrical Characteristics, Typical Operating
Characteristics, Pin Description, and the Compensation Design section. 1–7, 10, 11, 14