RTRT
Line Card in SLOT 1
Z0
BACKPLANE
DS91M124
Line Card in SLOT N-1
M-LVDS Receivers
RT = ZLOADED
Line Card in SLOT N
M-LVDS Receivers
RTRT
Z0
RTRT
Z0
RTRT
Z0
DS91M124
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DS91M124 125 MHz 1:4 M-LVDS Repeater with LVCMOS Input
Check for Samples: DS91M124
1FEATURES DESCRIPTION
The DS91M124 is a 1:4 M-LVDS repeater for driving
2 DC - 125 MHz / 250 Mbps Low Jitter, Low and distributing clock or data signals to up to four
Skew, Low Power Operation multipoint networks.
Independent Driver Enable Pins M-LVDS (Multipoint LVDS) is a new family of bus
Conforms to TIA/EIA-899 M-LVDS Standard interface devices based on LVDS technology
Controlled Transition Times Minimize specifically designed for multipoint and multidrop
Reflections cable and backplane applications. It differs from
standard LVDS in providing increased drive current to
8 kV ESD on M-LVDS I/O Pins Protects handle double terminations that are required in multi-
Adjoining Components point applications. Controlled transition times
Flow-Through Pinout Simplifies PCB Layout minimize reflections that are common in multipoint
Industrial Operating Temperature Range configurations due to unterminated stubs.
(40°C to +85°C) A single DS91M124 channel is a 1:4 repeater that
Available in a Space Saving SOIC-16 Package accepts LVTTL/LVCMOS signals at the driver inputs
and converts them to differential M-LVDS signal
APPLICATIONS levels. It features independent driver enable pins for
each driver output.
Multidrop / Multipoint Clock and Data
Distribution The DS91M124 has a flow-through pinout for easy
PCB layout. It provides a new alternative for high
High-Speed, Low Power, Short-Reach speed multipoint interface applications. It is packaged
Alternative to TIA/EIA-485/422 in a space saving SOIC-16 package.
Clock Distribution in AdvancedTCA (ATCA)
and MicroTCA (μTCA) Backplanes
Typical Application
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2008–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DI
DE0
DE1
DE2
DE3
B0
A0
B1
A1
B2
A2
B3
A3
DE0
DE1
DE2
VDD
B0
A0
A1
B1
1
2
3
4
16
14
13
15
GND
DI
N/C
DE3
5
6
7
8
B2
A2
A3
B3
12
10
9
11
DS91M124
SNLS287E AUGUST 2008REVISED APRIL 2013
www.ti.com
Pin Diagram
Figure 1. SOIC Package
See Package Number D0016A
Logic Diagram
Pin Descriptions
Number Name I/O, Type Description
1, 2, 3, 8 DE I, LVCMOS Driver enable pin: When a DE pin is low, the corresponding driver output is
disabled. When a DE pin is high, the corresponding driver output is enabled.
There is a 300 kpulldown resistor on each DE pin.
6 DI I, LVCMOS Driver input pin.
5 GND Power Ground pin.
10, 11, 14, 15 A O, M-LVDS Non-inverting driver output pins.
9, 12, 13, 16 B O, M-LVDS Inverting driver output pins.
4 VDD Power Power supply pin, +3.3V ± 0.3V
7 N/C N/A NO CONNECT pin.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings (1)(2)
Power Supply Voltage 0.3V to +4V
LVCMOS Input Voltage 0.3V to (VDD + 0.3V)
M-LVDS Output Voltage 1.9V to +5.5V
M-LVDS Output Short Circuit Current Duration Continuous
Junction Temperature +140°C
Storage Temperature Range 65°C to +150°C
Lead Temperature Range
Soldering (4 sec.) +260°C
Maximum Package Power Dissipation @ +25°C
D0016A Package 2.21W
Derate D0016A Package 19.2 mW/°C above +25°C
Package Thermal Resistance (4-Layer, 2 oz. Cu, JEDEC)
θJA +52°C/W
θJC +19°C/W
ESD Susceptibility
HBM (3) 8 kV
MM (4) 250V
CDM (5) 1250V
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Human Body Model, applicable std. JESD22-A114C
(4) Machine Model, applicable std. JESD22-A115-A
(5) Field Induced Charge Device Model, applicable std. JESD22-C101-C
Recommended Operating Conditions Min Typ Max Units
Supply Voltage, VDD 3.0 3.3 3.6 V
Voltage at Any Bus Terminal (Separate or Common-Mode) 1.4 +3.8 V
LVTTL Input Voltage High VIH 2.0 VDD V
LVTTL Input Voltage Low VIL 0 0.8 V
Operating Free Air
Temperature TA40 +25 +85 °C
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DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (1)(2)(3)(4)
Parameter Test Conditions Min Typ Max Units
LVCMOS DC Specifications
VIH High-Level Input Voltage 2.0 VDD V
VIL Low-Level Input Voltage GND 0.8 V
IIH High-Level Input Current VIH = 3.6V -15 ±1 15 μA
IIL Low-Level Input Current VIL = 0V -15 ±1 15 μA
VCL Input Clamp Voltage IIN = -18 mA -1.5 V
M-LVDS DC Specifications
|VAB| Differential Output Voltage Magnitude 480 650 mV
RL= 50Ω, CL= 5 pF
Figure 2
ΔVAB Change in Differential Output Voltage Magnitude 50 50 mV
Figure 4
Between Logic States
VOS(SS) Steady-State Common-Mode Output Voltage 0.30 1.6 2.10 V
Figure 2
Figure 3
|ΔVOS(SS)| Change in Steady-State Common-Mode Output Voltage 0 50 mV
RL= 50Ω
Between Logic States
VA(OC) Maximum Steady-State Open-Circuit Output Voltage 0 2.4 V
Figure 5
VB(OC) Maximum Steady-State Open-Circuit Output Voltage 0 2.4 V
VP(H) Voltage Overshoot, Low-to-High Level Output RL= 50, CL= 5 pF V
1.2VSS
(5) CD= 0.5 pF
Figure 7
VP(L) Voltage Overshoot, High-to-Low Level Output V
0.2VSS
Figure 8
(5)
IOS Output Short-Circuit Current (6) Figure 6 -43 43 mA
VA= 3.8V, VB= 1.2V 0 32 μA
IADriver High-Impedance Output Current VA= 0V or 2.4V, VB= 1.2V 20 20 μA
VA=1.4V, VB= 1.2V 32 0 μA
VA= 3.8V, VB= 1.2V 0 32 μA
IBDriver High-Impedance Output Current VA= 0V or 2.4V, VB= 1.2V 20 20 μA
VA=1.4V, VB= 1.2V 32 0 μA
IAB Driver High-Impedance Output Differential Curent VA= VB,1.4V V3.8V μA
4 4
(IAIB)
IA(OFF) Driver High-Impedance Output Power-Off Current VA= 3.8V, VB= 1.2V μA
DEn= 0V 0 32
0V VDD 1.5V
VA= 0V or 2.4V, VB= 1.2V μA
DEn= 0V 20 20
0V VDD 1.5V
VA=1.4V, VB= 1.2V μA
DEn= 0V 32 0
0V VDD 1.5V
(1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(2) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD and ΔVOD.
(3) Typical values represent most likely parametric norms for VDD = +3.3V and TA= +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
(4) CLincludes fixture capacitance and CDincludes probe capacitance.
(5) Specification is ensured by characterization and is not tested in production.
(6) Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
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DC Electrical Characteristics (continued)
Over supply voltage and operating temperature ranges, unless otherwise specified. (1)(2)(3)(4)
Parameter Test Conditions Min Typ Max Units
IB(OFF) Driver High-Impedance Output Power-Off Current VA= 3.8V, VB= 1.2V μA
DEn= 0V 0 32
0V VDD 1.5V
VA= 0V or 2.4V, VB= 1.2V μA
DEn= 0V 20 20
0V VDD 1.5V
VA=1.4V, VB= 1.2V μA
DEn= 0V 32 0
0V VDD 1.5V
IAB(OFF) Driver High-Impedance Output Power-Off Current VA= VB,1.4V V3.8V μA
(IA(OFF) IB(OFF)) DEn= 0V 4 4
0V VDD 1.5V
CADriver Output Capacitance 7.8 pF
CBDriver Output Capacitance 7.8 pF
VDD = 0V
CAB Driver Output Differential Capacitance 3 pF
CA/B Driver Output Capacitance Balance (CA/CB) 1
ICCL Loaded Supply Current Enabled RL= 50(All Outputs)
DI = VDD or GND 65 75 mA
DEn= VDD or GND (All
Outputs)
ICCZ No Load Supply Current Disabled DI = VDD or GND, 19 24 mA
DEn= GND (All Outputs)
Switching Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (1)(2)(3)
Parameter Test Conditions Min Typ Max Units
tPHL Differential Propagation Delay High to Low 1.8 3.9 6.5 ns
tPLH Differential Propagation Delay Low to High 1.8 3.9 6.5 ns
tSKD1 Differential Pulse Skew |tPHL tPLH|(4) (5) 0 25 100 ps
RL= 50Ω
tSKD2 Channel-to-Channel Skew (4) (6) 0 70 250 ps
CL= 5 pF,
CD= 0.5 pF
tSKD3 Differential Part-to-Part Skew (4) (7) 0 1.5 2 ns
Figure 7
(Constant TAand VDD) Figure 8
tSKD4 Differential Part-to-Part Skew (4) (8) 0 4.7 ns
tTLH Rise Time (4) 1.1 2.0 3.0 ns
tTHL Fall Time (4) 1.1 2.0 3.0 ns
tPHZ Disable Time High to Z 6 11 ns
RL= 50Ω
CL= 5 pF,
tPLZ Disable Time Low to Z 6 11 ns
CD= 0.5 pF
tPZH Enable Time Z to High 6 11 ns
Figure 9
Figure 10
tPZL Enable Time Z to Low 6 11 ns
fMAX Maximum Operating Frequency (4) 125 MHz
(1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(2) Typical values represent most likely parametric norms for VDD = +3.3V and TA= +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
(3) CLincludes fixture capacitance and CDincludes probe capacitance.
(4) Specification is ensured by characterization and is not tested in production.
(5) tSKD1, |tPLHD tPHLD|, Pulse Skew, is the magnitude difference in differential propagation delay time between the positive going edge and
the negative going edge of the same channel.
(6) tSKD2, Channel-to-Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels.
(7) tSKD3, Part-to-Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This
specification applies to devices at the same VDD and within 5°C of each other within the operating temperature range.
(8) tSKD4, Part-to-Part Skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices
over recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max Min|
differential propagation delay.
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A
B
~ 1.9V
~ 1.3V
'VOS(SS)
VOS(PP)
VOS
DS91M124
SNLS287E AUGUST 2008REVISED APRIL 2013
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Test Circuits and Waveforms
Figure 2. Differential Driver Test Circuit
Figure 3. Differential Driver Waveforms
Figure 4. Differential Driver Full Load Test Circuit
Figure 5. Differential Driver DC Open Test Circuit
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Figure 6. Differential Driver Short-Circuit Test Circuit
Figure 7. Driver Propagation Delay and Transition Time Test Circuit
Figure 8. Driver Propagation Delays and Transition Time Waveforms
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Figure 9. Driver TRI-STATE Delay Test Circuit
Figure 10. Driver TRI-STATE Delay Waveforms
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5.5
5.0
4.5
4.0
3.5
3.0
2.5-50 -10 30 70 110 150
f = 125 MHz
DRIVER PROPAGATION DELAY (tPHLD) (ns)
TEMPERATURE (°C)
VCC = 3.0 V
VCC = 3.3 V VCC = 3.6 V
180
150
120
90
60
30
00 25 50 75 100 125
VCC = 3.3V
TA = 25°C
RL = 50:On all CH)
POWER SUPPLY CURRENT (mA)
FREQUENCY (MHz)
3 Outputs ON
4 Outputs ON
2 Outputs ON
1 Output ON
900
750
600
450
300
150
00 25 50 75 100 125
VOD - DRIVER OUTPUT AMPLITUDE (mV)
RESISTIVE LOAD (:)
f = 1 MHz
VCC = 3.3V
TA = 25°C
5.5
5.0
4.5
4.0
3.5
3.0
2.5-50 -10 30 70 110 150
f = 125 MHz
DRIVER PROPAGATION DELAY (tPLHD) (ns)
TEMPERATURE (°C)
VCC = 3.0 V
VCC = 3.3 V
VCC = 3.6 V
3.4
3.0
2.6
2.2
1.8
1.4
1.0-50 -10 30 70 110 150
f = 125 MHz
DRIVER RISE TIME (10-90%) (ns)
TEMPERATURE (°C)
VCC = 3.0 V
VCC = 3.3 V VCC = 3.6 V
3.4
3.0
2.6
2.2
1.8
1.4
1.0-50 -10 30 70 110 150
f = 125 MHz
DRIVER FALL TIME (10-90%) (ns)
TEMPERATURE (°C)
VCC = 3.0 V
VCC = 3.3 V VCC = 3.6 V
DS91M124
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SNLS287E AUGUST 2008REVISED APRIL 2013
Typical Performance Characteristics
Figure 11. Driver Rise Time as a Function of Temperature Figure 12. Driver Fall Time as a Function of Temperature
Figure 13. Driver Output Signal Amplitude as a Function of Figure 14. Driver Propagation Delay (tPLHD) as a Function
Resistive Load of Temperature
Figure 15. Driver Propagation Delay (tPHLD) as a Function Figure 16. Driver Power Supply Current as a Function of
of Temperature Frequency
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REVISION HISTORY
Changes from Revision D (April 2013) to Revision E Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 9
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PACKAGE OPTION ADDENDUM
www.ti.com 16-Apr-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
DS91M124TMA/NOPB ACTIVE SOIC D 16 48 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS91M124
TMA
DS91M124TMAX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS91M124
TMA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
DS91M124TMAX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
DS91M124TMAX/NOPB SOIC D 16 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 2
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