DS91M125
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SNLS290C AUGUST 2008REVISED APRIL 2013
DS91M125 125 MHz 1:4 M-LVDS Repeater with LVDS Input
Check for Samples: DS91M125
1FEATURES DESCRIPTION
The DS91M125 is a 1:4 M-LVDS repeater designed
2 DC - 125 MHz / 250 Mbps Low Jitter, Low for driving and distributing clock or data signals to up
Skew, Low Power Operation to four multipoint networks.
Independent Driver Enable Pins M-LVDS (Multipoint LVDS) is a new family of bus
Outputs Conform to TIA/EIA-899 M-LVDS interface devices based on LVDS technology
Standard specifically designed for multipoint and multidrop
Controlled Transition Times Minimize cable and backplane applications. It differs from
Reflections standard LVDS in providing increased drive current to
handle double terminations that are required in multi-
Inputs Conform to TIA/EIA-644-A LVDS point applications. Controlled transition times
Standard minimize reflections that are common in multipoint
8 kV ESD on M-LVDS Output Pins Protects configurations due to unterminated stubs.
Adjoining Components A single DS91M125 channel is a 1:4 repeater that
Flow-Through Pinout Simplifies PCB Layout accepts M-LVDS/LVDS/CML/LVPECL signals and
Industrial Operating Temperature Range converts them to M-LVDS signal levels. Each output
(40°C to +85°C) has an associated independent driver enable pin. The
DS91M125 input conforms to the LVDS standard.
Available in a Space Saving SOIC-16 Package The DS91M125 has a flow-through pinout for easy
APPLICATIONS PCB layout. It provides a new alternative for high
speed multipoint interface applications. It is packaged
Multidrop / Multipoint Clock and Data in a space saving SOIC-16 package.
Distribution
High-Speed, Low Power, Short-Reach
Alternative to TIA/EIA-485/422
Clock Distribution in AdvancedTCA (ATCA)
and MicroTCA (μTCA, uTCA) Backplanes
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2008–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DE0
DE1
DE2
VDD
B0
A0
A1
B1
1
2
3
4
16
14
13
15
GND
DI+
DI-
DE3
5
6
7
8
B2
A2
A3
B3
12
10
9
11
RTRT
RTRT
RTRT
RTRT
Line Card in SLOT 1
Z0
Z0
Z0
Z0
BACKPLANE
DS91M125
Line Card in SLOT N-1
M-LVDS Receivers
RT = ZLOADED
Line Card in SLOT N
M-LVDS Receivers
DS91M125
SNLS290C AUGUST 2008REVISED APRIL 2013
www.ti.com
Typical Application
Connection Diagram
Figure 1. 16-Lead (0.150Wide) Molded Small Outline Package, JEDEC
See Package Number D
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DI+
DE0
DE1
DE2
DE3
B0
A0
B1
A1
B2
A2
B3
A3
DI-
DS91M125
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SNLS290C AUGUST 2008REVISED APRIL 2013
Logic Diagram
PIN DESCRIPTIONS
Number Name I/O, Type Description
1, 2, 3, 8 DE I, LVCMOS Driver enable pins: When DE is low, the driver is disabled. When DE is high,
the driver is enabled. There is a 300 kpulldown resistor on each pin.
6 DI+ I, LVDS Non-inverting receiver input pin.
7 DI- I, LVDS Inverting receiver input pin.
5 GND Power Ground pin.
10, 11, 14, 15 A O, M-LVDS Non-inverting driver output pin.
9, 12, 13, 16 B O, M-LVDS Inverting driver output pin.
4 VDD Power Power supply pin, +3.3V ± 0.3V
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)
Supply Voltage 0.3V to +4V
LVCMOS Input Voltages 0.3V to (VDD + 0.3V)
M-LVDS Output Voltages 1.9V to +5.5V
LVDS Input Voltages 0.3V to (VDD + 0.3V)
Maximum Package Power Dissipation at +25°C SOIC Package 2.21W
Derate SOIC Package 19.2 mW/°C above +25°C
Thermal Resistance (4-Layer, 2 oz. Cu, JEDEC) θJA 52°C/W
θJC 19°C/W
Maximum Junction Temperature 140°C
Storage Temperature Range 65°C to +150°C
Lead Temperature (Soldering, 4 seconds) 260°C
ESD Susceptibility HBM(3) 8 kV
MM(4) 250V
CDM(5) 1250V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) Human Body Model, applicable std. JESD22-A114C
(4) Machine Model, applicable std. JESD22-A115-A
(5) Field Induced Charge Device Model, applicable std. JESD22-C101-C
RECOMMENDED OPERATING CONDITIONS Min Typ Max Units
Supply Voltage, VDD 3.0 3.3 3.6 V
Voltage at M-LVDS Outputs 1.4 +3.8 V
Voltage at LVDS Inputs 0 VDD V
LVCMOS Input Voltage High VIH 2.0 VDD V
LVCMOS Input Voltage Low VIL 0 0.8 V
Operating Free Air Temperature TA40 +25 +85 °C
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SNLS290C AUGUST 2008REVISED APRIL 2013
ELECTRICAL CHARACTERISTICS
Over recommended operating supply and temperature ranges unless otherwise specified.(1)(2)(3)(4)
Symbol Parameter Conditions Min Typ Max Units
LVCMOS DC Specifications
VIH High-Level Input Voltage 2.0 VDD V
VIL Low-Level Input Voltage GND 0.8 V
IIH High-Level Input Current VIH = 3.6V -15 ±1 15 μA
IIL Low-Level Input Current VIL = 0V -15 ±1 15 μA
VCL Input Clamp Voltage IIN = -18 mA -1.5 V
M-LVDS Driver DC Specifications
|VAB| Differential output voltage magnitude RL= 50, CL= 5pF 480 650 mV
ΔVAB Change in differential output voltage magnitude See Figure 2and Figure 4 50 0 +50 mV
between logic states
VOS(SS) Steady-state common-mode output voltage RL= 50, CL= 5pF 0.3 1.6 2.1 V
|ΔVOS(SS)| Change in steady-state common-mode output voltage See Figure 2 0 +50 mV
between logic states and Figure 3
VA(OC) Maximum steady-state open-circuit output voltage See Figure 5 0 2.4 V
VB(OC) Maximum steady-state open-circuit output voltage 0 2.4 V
VP(H) Voltage overshoot, low-to-high level output RL= 50, CL= 5pF,CD= 0.5pF
See Figure 7 and Figure 8 1.2VSS V
(5)
VP(L) Voltage overshoot, high-to-low level output 0.2V V
SS
IOS Differential short-circuit output current See Figure 6 (6) -43 43 mA
IADriver output current VA= 3.8V, VB= 1.2V 32 µA
VA= 0V or 2.4V, VB= 1.2V 20 +20 µA
VA=1.4V, VB= 1.2V 32 µA
IBDriver output current VB= 3.8V, VA= 1.2V 32 µA
VB= 0V or 2.4V, VA= 1.2V 20 +20 µA
VB=1.4V, VA= 1.2V 32 µA
IAB Driver output differential current (IAIB) VA= VB,1.4V V3.8V 4 +4 µA
IA(OFF) Driver output power-off current VA= 3.8V, VB= 1.2V,
DE = 0V 32 µA
0V VDD 1.5V
VA= 0V or 2.4V, VB= 1.2V,
DE = 0V 20 +20 µA
0V VDD 1.5V
VA=1.4V, VB= 1.2V,
DE = 0V 32 µA
0V VDD 1.5V
(1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(2) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD and ΔVOD.
(3) Typical values represent most likely parametric norms for VDD = +3.3V and TA= +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
(4) CLincludes fixture capacitance and CDincludes probe capacitance.
(5) Specification is ensured by characterization and is not tested in production.
(6) Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
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ELECTRICAL CHARACTERISTICS (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.(1)(2)(3)(4)
Symbol Parameter Conditions Min Typ Max Units
IB(OFF) Driver output power-off current VB= 3.8V, VA= 1.2V,
DE = 0V 32 µA
0V VDD 1.5V
VB= 0V or 2.4V, VA= 1.2V,
DE = 0V 20 +20 µA
0V VDD 1.5V
VB=1.4V, VA= 1.2V,
DE = 0V 32 µA
0V VDD 1.5V
IAB(OFF) Driver output power-off differential current (IA(OFF) VA= VB,1.4V V3.8V,
IB(OFF)) DE = 0V 4 +4 µA
0V VDD 1.5V
CADriver output capacitance VDD = OPEN 7.8 pF
CBDriver output capacitance 7.8 pF
CAB Driver output differential capacitance 3 pF
CA/B Driver output capacitance balance (CA/CB) 1
LVDS Receiver DC Specifications
VIT+ Positive-going differential input voltage threshold -5 100 mV
VITNegative-going differential input voltage threshold 100 -5 mV
VCMR Common mode voltage range VID = 100 mV 0.05 VDD- V
0.05
IIN Input current VIN = 3.6V, VDD = 3.6V ±1 ±10 µA
VIN = 0V, VDD = 3.6V ±1 ±10 µA
CIN Input capacitance VDD = OPEN 5 pF
POWER SUPPLY CURRENT
ICCD Driver Supply Current RL= 50, DE = VDD 67 78 mA
ICCZ TRI-STATE Supply Current DE = GND 21 26 mA
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A
DI+
D
Driver ENABLED
RL/2
CL
B
CL
CL
RL/2
VOS VAB
Power Supply
Power Supply DI-
DS91M125
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SNLS290C AUGUST 2008REVISED APRIL 2013
SWITCHING CHARACTERISTICS
Over recommended operating supply and temperature ranges unless otherwise specified. (1) (2) (3)
Symbol Parameter Conditions Min Typ Max Units
DRIVER AC SPECIFICATION
tPLH Differential Propagation Delay Low to High RL= 50Ω, CL= 5 pF, 3.0 5.5 8.5 ns
tPHL Differential Propagation Delay High to Low CD= 0.5 pF 3.0 5.5 8.5 ns
tSKD1 (tsk(p)) Pulse Skew |tPLHD tPHLD|(4)(5) See Figure 7 and Figure 8 65 350 ps
tSKD2 Channel-to-Channel Skew(6)(5) 65 400 ps
tSKD3 Part-to-Part Skew(7)(5) 2.2 2.5 ns
tSKD4 Part-to-Part Skew(8) 5.5 ns
tTLH (tr) Rise Time(5) 1.1 2.0 3.0 ns
tTHL (tf) Fall Time(5) 1.1 2.0 3.0 ns
tPZH Enable Time (Z to Active High) RL= 50, CL= 5 pF, 6 11 ns
tPZL Enable Time (Z to Active Low ) CD= 0.5 pF 6 11 ns
tPLZ Disable Time (Active Low to Z) See Figure 9 and Figure 10 6 11 ns
tPHZ Disable Time (Active High to Z) 6 11 ns
fMAX Maximum Operating Frequency(5) 125 MHz
(1) The ELECTRICAL CHARACTERISTICS tables list ensured specifications under the listed Recommended Operating Conditions except
as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes.
(2) Typical values represent most likely parametric norms for VDD = +3.3V and TA= +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
(3) CLincludes fixture capacitance and CDincludes probe capacitance.
(4) tSKD1, |tPLHD tPHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative
going edge of the same channel.
(5) Specification is ensured by characterization and is not tested in production.
(6) tSKD2, Channel-to-Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels.
(7) tSKD3, Part-to-Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This
specification applies to devices at the same VDD and within 5°C of each other within the operating temperature range.
(8) tSKD4, Part-to-Part Skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices
over recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max Min|
differential propagation delay.
TEST CIRCUITS AND WAVEFORMS
Figure 2. Differential Driver Test Circuit
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A
D
B
VTEST
Vary VTEST ± 1.0V to 3.4V
IOS
Power Supply DI+
Power Supply DI-
A
D
1.62 k:
BV
V = VA or VB
Power Supply
Power Supply DI-
DI+
A
Power Supply D
3.32 k:
B
VAB
VTEST
3.32 k:
RL
Vary VTEST ± 1.0V to 3.4V
DI+
Power Supply DI-
A
B
~ 1.9V
~ 1.3V
'VOS(SS)
VOS(PP)
VOS
DS91M125
SNLS290C AUGUST 2008REVISED APRIL 2013
www.ti.com
Figure 3. Differential Driver Waveforms
Figure 4. Differential Driver Full Load Test Circuit
Figure 5. Differential Driver DC Open Test Circuit
Figure 6. Differential Driver Short-Circuit Test Circuit
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50:
A
B
CL
VOS(SS) TYP
Generator
CD
D
DE
RL/2
RL/2
CL
DI+
Power Supply
Power Supply DI-
50:
A
B
CL
CD
CL
RL
Driver ENABLED
D
Signal Generator
DI+
DI-
50:
DS91M125
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SNLS290C AUGUST 2008REVISED APRIL 2013
Figure 7. Driver Propagation Delay and Transition Time Test Circuit
Figure 8. Driver Propagation Delays and Transition Time Waveforms
Figure 9. Driver TRI-STATE Delay Test Circuit
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Product Folder Links: DS91M125
tPLZ
50%
VDD /
2
tPHZ
DE
A-B WHEN DIN = H
A-B WHEN DIN = L 50%
tPZL
50%
VDD /2
tPZH
50% 0V
0V
0V
VDD
~ 0.6V
~ 0.6V
DS91M125
SNLS290C AUGUST 2008REVISED APRIL 2013
www.ti.com
Figure 10. Driver TRI-STATE Delay Waveforms
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8.0
7.0
6.0
5.0
4.0
3.0
2.0-50 -10 30 70 110 150
f = 125 MHz
DRIVER PROPAGATION DELAY (tPHLD) (ns)
TEMPERATURE (°C)
VCC = 3.0 V
VCC = 3.3 V VCC = 3.6 V
2 Outputs ON
1 Output ON
4 Outputs ON
3 Outputs ON
180
150
120
90
60
30
00 25 50 75 100 125
VCC = 3.3V
TA = 25°C
RL = 50:On all CH)
POWER SUPPLY CURRENT (mA)
FREQUENCY (MHz)
900
750
600
450
300
150
00 25 50 75 100 125
f = 1 MHz
VCC = 3.3V
TA = 25°C
VOD - DRIVER OUTPUT AMPLITUDE (mV)
RESISTIVE LOAD (:)
8.0
7.0
6.0
5.0
4.0
3.0
2.0-50 -10 30 70 110 150
f = 125 MHz
DRIVER PROPAGATION DELAY (tPLHD) (ns)
TEMPERATURE (°C)
VCC = 3.0 V
VCC = 3.3 V
VCC = 3.6 V
3.4
3.0
2.6
2.2
1.8
1.4
1.0-50 -10 30 70 110 150
f = 125 MHz
DRIVER RISE TIME (10-90%) (ns)
TEMPERATURE (°C)
VCC = 3.0 V
VCC = 3.3 V VCC = 3.6 V
3.4
3.0
2.6
2.2
1.8
1.4
1.0-50 -10 30 70 110 150
f = 125 MHz
DRIVER FALL TIME (10-90%) (ns)
TEMPERATURE (°C)
VCC = 3.0 V
VCC = 3.3 V VCC = 3.6 V
DS91M125
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SNLS290C AUGUST 2008REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 11. Driver Rise Time as a Function of Temperature Figure 12. Driver Fall Time as a Function of Temperature
Figure 13. Driver Output Signal Amplitude as a Function of Figure 14. Driver Propagation Delay (tPLHD) as a Function
Resistive Load of Temperature
Figure 15. Driver Propagation Delay (tPHLD) as a Function Figure 16. Driver Power Supply Current as a Function of
of Temperature Frequency
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REVISION HISTORY
Changes from Revision B (April 2013) to Revision C Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 11
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PACKAGE OPTION ADDENDUM
www.ti.com 26-Aug-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
DS91M125TMA/NOPB ACTIVE SOIC D 16 48 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS91M125
TMA
DS91M125TMAX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 DS91M125
TMA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
DS91M125TMAX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
DS91M125TMAX/NOPB SOIC D 16 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Apr-2013
Pack Materials-Page 2
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Mouser Electronics
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Texas Instruments:
DS91M125TMA/NOPB DS91M125TMAX/NOPB