Precision Edge(R) SY58029U (R) ULTRA PRECISION DIFFERENTIAL LVPECL 4:1 MUX with 1:2 FANOUT and INTERNAL TERMINATION Micrel, Inc. Precision Edge SY58029U FEATURES Selects 1 of 4 differential inputs Provides two copies of the selected input Guaranteed AC performance over temperature and voltage: * DC-to-> 5Gbps data rate throughput * < 390ps IN-to-Out tpd * < 110ps tr / tf times Ultra low-jitter design: * < 10psPP total jitter (clock) * < 1psRMS random jitter * < 10psPP deterministic jitter * < 0.7psRMS crosstalk-induced jitter Unique patended input design minimizes crosstalk Accepts an input signal as low as 100mV Unique patented input termination and VT pin accepts DC- and AC-coupled inputs (CML, LVPECL, LVDS) 800mV 100K LVPECL output swing Power supply 2.5V 5% or 3.3V 10% -40C to +85C temperature range Available in 32-pin (5mm 5mm) MLF(R) package Precision Edge(R) DESCRIPTION The SY58029U is a 2.5V/3.3V precision, high-speed, 4:1 differential multiplexer with 100k LVPECL (800mV) compatible outputs, capable of handling clocks up to 4GHz and data streams up to 5Gbps. In addition, a 1:2 fanout buffer provides two copies of the selected inputs. The differential input includes Micrel's unique, 3-pin input termination architecture that allows customers to interface to any differential signal (AC- or DC-coupled) as small as 100mV without any level shifting or termination resistor networks in the signal path. The result is a clean, stub-free, low-jitter interface solution. The outputs are 800mV LVPECL, (100k temperature compensated) with extremely fast rise/ fall times guaranteed to be less than 110ps. The SY58029U operates from a 2.5V 5% supply or a 3.3V 10% supply and is guaranteed over the full industrial temperature range of -40C to +85C. For applications that require CML outputs, consider the SY58028U. For 400mV LVPECL outputs, consider the SY58030U. The SY58029U is part of Micrel's high-speed, Precision Edge(R) product line. All support documentation can be found on Micrel's web site at www.micrel.com. APPLICATIONS FUNCTIONAL BLOCK DIAGRAM Redundant clock and/or distribution All SONET/SDH clock/data distribution Loopback All Fibre Channel distribution All Gigabit Ethernet clock and/or data distribution IN0 50 VT0 50 4:1 MUX /IN0 VREF-AC0 1:2 Fanout 0 TYPICAL PERFORMANCE IN1 50 VT1 50 Q0 MUX 2 IN2 Output Swing (200mV/div.) /Q0 1 /IN1 VREF-AC1 Q1 50 /Q1 VT2 50 /IN2 3 VREF-AC2 IN3 50 VT3 50 /IN3 TIME (100ps/div.) VREF-AC3 Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. M9999-082707 hbwhelp@micrel.com or (408) 955-1690 SEL0 (CMOS/TTL) SEL1 (CMOS/TTL) Rev.: D 1 Amendment: /0 Issue Date: August 2007 Precision Edge(R) SY58029U Micrel, Inc. PACKAGE/ORDERING INFORMATION /IN3 VREF-AC3 VT3 IN3 /IN2 VREF-AC2 VT2 IN2 Ordering Information(1) 32 31 30 29 28 27 26 25 IN0 VT0 VREF-AC0 /IN0 IN1 VT1 VREF-AC1 /IN1 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 GND VCC Q1 /Q1 VCC NC SEL1 VCC 9 10 11 12 13 14 15 16 Part Number Package Type Operating Range Package Marking Lead Finish SY58029UMI MLF-32 Industrial SY58029U Sn-Pb SY58029UMITR(2) MLF-32 Industrial SY58029U Sn-Pb SY58029UMG(3) MLF-32 Industrial SY58029U with Pb-Free bar-line indicator Pb-Free NiPdAu SY58029UMGTR(2, 3) MLF-32 Industrial SY58029U with Pb-Free bar-line indicator Pb-Free NiPdAu GND VCC /Q0 Q0 VCC NC SEL0 VCC Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs. 32-Pin MLF(R) (MLF-32) PIN DESCRIPTION Pin Number Pin Name 1, 4 5, 8 25, 28 29, 32 IN0, IN1, IN2, IN3, Pin Function /IN0 /IN1 /IN2 /IN3 Differential Input: Each pair accepts AC- or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50y. Note that these inputs will default to an indeterminate state if left open. If an input is not used, connect one end of the differential pairs to ground through a 1ky resistor, and leave the other end to VCC through a 825y resistor. Unused VT and VREF-AC pins may also be left floating. Please refer to the "Input Interface Applications" section for more details. 2, 6, 26, 30 VT0, VT1 VT2, VT3 Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT pin provides a center-tap to the termination network for maximum interface flexibility. See "Input Interface Applications" section for more details. 15, 18 SEL0, SEL1 14, 19 NC 10, 13, 16 17, 20, 23 VCC 11, 12 21, 22 /Q0, Q0 /Q1, Q1 Differential Outputs: These 100k compatible (internally temperature compensated) LVPECL output pairs are copies of the selected input. Unused output pins may be left floating. See "Output Interface" for terminating guidelines. 9, 24 GND, Exposed Pad Ground. Ground pin and exposed pad must be connected to the same ground plane. 3, 7, 27, 31 VREF-AC0 VREF-AC1 VREF-AC2 VREF-AC3 This Single-Ended TTL/CMOS compatible input selects the inputs to the multiplexer. Note that this input is internally connected to a 25ky pull-up resistor and will default to a logic HIGH state if left open. Input logic threshold is VCC/2. See "Truth Table" for select control. No Connect. Positive Power Supply: Bypass with 0.1FTM0.01F low ESR capacitors. Reference Voltage: This reference output is equivalent to VCC-1.4V. It is used for AC-coupled inputs. When interfacing to AC input signals, connect VREF-AC directly to the VT pin and bypass with 0.01F low ESR capacitor to VCC. See "Input Interface Applications" section. Maximum sink/source current is 0.5mA. TRUTH TABLE SEL1 SEL0 0 0 IN0 Input Selected 0 1 IN1 Input Selected 1 0 IN2 Input Selected 1 1 IN3 Input Selected M9999-082707 hbwhelp@micrel.com or (408) 955-1690 2 Precision Edge(R) SY58029U Micrel, Inc. Absolute Maximum Ratings(1) Operating Ratings(2) Power Supply Voltage (VCC ) ...................... -0.5V to +4.0V Input Voltage (VIN) .......................................... -0.5V to VCC LVPECL Output Current (IOUT) Continuous .............................................................. 50mA Surge ....................................................................100mA Termination Current(3) Source or sink current on VT pin......................... 100mA Input Current Source or sink current on IN, /IN pin .................... 50mA Lead Temperature (soldering, 20 sec.) ..................... 260C Storage Temperature Range (TS ) ........... -65C to +150C Power Supply Voltage (VCC) ............... +2.375V to +2.625V ............................................................. +3.0V to +3.6V Ambient Temperature Range (TA) .............. -40C to +85C Package Thermal Resistance(4) MLF(R) (JA) Still-Air ............................................................. 50C/W MLF(R) (JB) Junction-to-Board ............................................ 20C/W DC ELECTRICAL CHARACTERISTICS(5) TA= -40C to +85C, unless otherwise stated. Symbol Parameter Condition Min Typ Max Units VCC Power Supply Voltage VCC = 2.5V 2.375 2.5 2.625 V VCC = 3.3V 3.0 3.3 3.6 V 110 140 mA ICC Power Supply Current No load, max. VCC RDIFF_IN Differential Input Resistance (IN-to-/IN) 80 100 120 y RIN Input Resistance (IN-to-/IN, /IN-to-VT) 40 50 60 y VIH Input HIGH Voltage (IN-to-/IN) VCC-1.6 VCC V VIL Input LOW Voltage (IN-to-/IN) 0 VIH-0.1 V VIN Input Voltage Swing (IN-to-/IN) See Figure 1a. 0.1 1.7 V VDIFF_IN Differential Input Voltage Swing (IN-to-/IN) See Figure 1b. 0.2 VT IN Max Input Voltage (IN-to-VT) VREF-AC Reference Voltage Note 6 V 1.28 VCC-1.3 VCC-1.2 VCC-1.1 V V Notes: 1. Permanent device damage may occur if ratings in the "Absolute Maximum Ratings" section are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability, use for input of the same package only. 4. Thermal performance assumes exposed pad is soldered (or equivalent) to the device's most negative potential (GND) on the PCB. JB uses 4-layer JA in still air number unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 6. VIH (min) not lower than 1.2V. M9999-082707 hbwhelp@micrel.com or (408) 955-1690 3 Precision Edge(R) SY58029U Micrel, Inc. LVPECL OUTPUT DC ELECTRICAL CHARACTERISTICS(7) VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C; RL = 50y to VCC -2V across each output pair, unless otherwise stated. Symbol Parameter Condition Min Typ Max Units VOH Output HIGH Voltage VCC-1.145 VCC-0.895 V VOL Output LOW Voltage VCC-1.945 VCC-1.695 V VOUT Output Voltage Swing See Figure 1a. 550 800 mV VDIFF_OUT Differential Output Voltage Swing See Figure 1b. 1100 1600 mV Typ LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(7) VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C, unless otherwise stated. Symbol Parameter Condition Min VIH Input HIGH Voltage SEL0, SEL1 2.0 VIL Input LOW Voltage SEL0, SEL1 IIH IIL Max Units V 0.8 V Input HIGH Current 40 A Input LOW Current -300 A Note: 7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. M9999-082707 hbwhelp@micrel.com or (408) 955-1690 4 Precision Edge(R) SY58029U Micrel, Inc. AC ELECTRICAL CHARACTERISTICS(8) VCC = 2.5V 5% or 3.3V 10%; RL = 50y to VCC-2V; TA= -40C to +85C, VIN 100mV, unless otherwise stated. Symbol Parameter Condition fMAX Maximum Operating Frequency Min NRZ Data VOUT 400mV tpd Propagation Delay (Diff) (IN-to-Q) (SEL-to-Q) tpd Tempco tJITTER Output-to-Output GHz 215 390 ps 100 500 ps 115 Note 9 7 fs/C 15 ps 100 ps Part-to-Part Note 10 Random Jitter Note 11 2.5Gbps to 3.2Gbps 1 psRMS Deterministic Jitter Note 12 2.5Gbps to 3.2Gbps 10 psPP Cycle-to-Cycle Jitter Note 13 1 psRMS Total Jitter Note 14 10 psPP Crosstalk Induced Jitter (Adjacent Channel) Note 15 0.7 psRMS Output Rise/Fall Time 20% to 80%, VIN = 800mV, full output swing 110 ps Data Clock tr, tf Units Gbps 4 Differential Propagation Delay Temperature Coefficient tSKEW Max 5 Clock VIN 100mV Typ 35 60 Notes: 8. High frequency AC electricals are guaranteed by design and characterization. 9. Output-to-output skew is measured between outputs under identical input conditions. 10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. 11. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps to 3.2Gbps. 12. Deterministic jitter is measured at 2.5Gbps to 3.2Gbps, with both K28.5 and 223-1 PRBS pattern. 13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn-Tn-1 where T is the time between rising edges of the output signal. 14. Total jitter definition: with an ideal clock input of frequency - fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. 15. Crosstalk is measured at the output while applying two similar clock frequencies that are asynchronous with respect to each other at the inputs. SINGLE-ENDED AND DIFFERENTIAL SWINGS VDIFF_IN, VDIFF_OUT 1.6V (Typ.) VIN, VOUT 800mV (Typ.) Figure 1a. Single-Ended Voltage Swing M9999-082707 hbwhelp@micrel.com or (408) 955-1690 Figure 1b. Differential Voltage Swing 5 Precision Edge(R) SY58029U Micrel, Inc. TIMING DIAGRAMS IN VIN /IN tpd tpd Q VOUT /Q Figure 2a. IN-to-Q Timing Diagram VCC/2 VCC/2 tpd tpd SEL Q VOUT /Q Figure 2b. SEL-to-Q Timing Diagram SEL0 Q: or: SEL1 = LOW; SEL1 = HIGH; IN0, /IN1 = LOW; IN2, /IN3 = LOW; /IN0, IN1 = HIGH /IN2, IN3 = HIGH or: SEL0 = LOW; SEL0 = HIGH; IN0, /IN2 = LOW; IN1, /IN3 = LOW; /IN0, IN2 = HIGH /IN1, IN3 = HIGH SEL1 Q: M9999-082707 hbwhelp@micrel.com or (408) 955-1690 6 Precision Edge(R) SY58029U Micrel, Inc. FUNCTIONAL CHARACTERISTICS VCC = 2.5V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated. Output Swing (200mV/div.) 1.25GHz Output Output Swing (200mV/div.) 200MHz Output TIME (600ps/div.) TIME (100ps/div.) 1.25Gbps Output (223--1 PRBS) Output Swing (200mV/div.) Output Swing (200mV/div.) 2.5GHz Output TIME (50ps/div.) TIME (200ps/div.) 3.2Gbps Output (223 -1 PRBS) Output Swing (200mV/div.) Output Swing (200mV/div.) 5Gbps Output (223--1 PRBS) TIME (50ps/div.) TIME (100ps/div.) M9999-082707 hbwhelp@micrel.com or (408) 955-1690 7 Precision Edge(R) SY58029U Micrel, Inc. TYPICAL OPERATING CHARACTERISTICS VCC = 2.5V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated. OUTPUT-to-OUTPUT SKEW (ps) PROPAGATION DELAY (ps) 320 Propagation Delay vs. Input Voltage 315 310 305 300 295 290 285 280 0 200 400 600 800 1000 1200 Output-to-Output Skew vs. Temperature 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -40 -20 Propagation Delay vs. Temperature 800 OUTPUT AMPLITUDE (mV) PROPAGATION DELAY (ps) 310 308 306 304 302 300 298 296 -60 -40 -20 0 20 40 60 80 100 Output Amplitude vs. Frequency 700 600 500 400 300 200 100 0 0 1 2 3 4 5 6 7 8 9 10 20 40 60 80 100 TEMPERATURE (C) M9999-082707 hbwhelp@micrel.com or (408) 955-1690 0 TEMPERATURE (C) INPUT VOLTAGE (mV) FREQUENCY (GHz) 8 Precision Edge(R) SY58029U Micrel, Inc. INPUT STAGE VCC IN 50 VT GND 50 /IN Figure 3. Simplified Differential Input Stage INPUT INTERFACE APPLICATIONS VCC IN LVPECL VCC VCC /IN SY58029U IN IN CML CML GND /IN /IN VREF-AC NC VCC SY58029U SY58029U GND NC VREF-AC NC VT GND For a 3.3V system, Rpd = 50 For a 2.5V system, Rpd = 19 VT 0.01F Figure 4b. CML Interface (AC-coupled) Option: May connect VT to VCC VCC IN VCC PECL /IN Rpd Rpd IN SY58029U LVDS GND VCC GND 0.01F /IN VREF-AC VT For a 3.3V system, Rpd = 100 For a 2.5V system, Rpd = 50 Figure 4d. LVPECL Interface (AC-coupled) M9999-082707 hbwhelp@micrel.com or (408) 955-1690 SY58029U GND Rpd VREF-AC VCC Figure 4a. CML Interface (DC-coupled) VT 0.01F NC VREF-AC NC VT Figure 4e. LVDS Interface 9 Figure 4c. PECL Interface (DC-coupled) Precision Edge(R) SY58029U Micrel, Inc. OUTPUT INTERFACE APPLICATIONS +3.3V +3.3V +3.3V ZO = 50 R1 130 +3.3V Z = 50 R1 130 +3.3V Z = 50 ZO = 50 50 R2 82 R2 82 50 Figure 5a. Parallel Thevenin-Equivalent Termination 50 Rb destination VCC C1 0.01F (optional) Figure 5b. Parallel Termination (Three-Resistor "Y") Note: Note: 1. For a 2.5V system, R1 = 250y, R2 = 62.5y. 1. For a 2.5V system, Rb = 19y. For a 3.3V system, Rb = 50y. For a 3.3V system, R1 = 130y, R2 = 82y. RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION Part Number Function Data Sheet Link SY58028U Ultra Precision Differential CML 4:1 MUX with 1:2 Fanout and Internal I/O Termination http://www.micrel.com/product-info/products/sy58028u.shtml SY58029U Ultra Precision Differential LVPECL 4:1 MUX with 1:2 Fanout and Internal Termination http://www.micrel.com/product-info/products/sy58029u.shtml SY58030U Ultra Precision, 400mV Differential LVPECL 4:1 MUX with 1:2 Fanout and Internal Termination http://www.micrel.com/product-info/products/sy58030u.shtml MLF(R) Application Note www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf New Products and Applications www.micrel.com/product-info/products/solutions.shtml HBW Solutions M9999-082707 hbwhelp@micrel.com or (408) 955-1690 10 Precision Edge(R) SY58029U Micrel, Inc. 32-PIN MicroLeadFrame(R) (MLF-32) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane PCB Thermal Consideration for 32-Pin MLF(R) Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 qualification. 2. All parts are dry-packaged before shipment. 3. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. M9999-082707 hbwhelp@micrel.com or (408) 955-1690 11