CGD1200HB2P-BM2 Dual Channel Differential Isolated Gate Driver 1200 V BM2 SiC Half-Bridge Module Companion Tool Technical Features VDrive +20/-5V IG 10 A RG 1 Package * Optimized for use with Cree's HighPerformance 1200 V BM2 Half-Bridge Power Modules * High-Frequency, Ultra-Fast Switching Operation * On-Board 2 W Isolated Power Supplies * Primary OVLO and UVLO with Hysteresis * On-Board Overcurrent, Shoot-Through, and Reverse Polarity Protection * Differential Inputs for Increased Noise Immunity * Very Low Isolation Capacitance * Single-Ended to Differential Daughter Board Available Upon Request (CGD12HB00D) Applications * DC Bus Voltages up to 1000 V Maximum Ratings Symbol Value VDC Supply Voltage -0.5 to 13.2 VI Logic Level Inputs -0.5 to 5.5 IO Output Peak Current (TA = 25 C) Unit V 10 A Output Power per Channel (TA = 25 C) 2 W fS Maximum Switching Frequency (Module & MOSFET Dependent, see Power Estimate Section) 75 kHz Top Ambient Operating Temperature -40 to +85 Tstg Storage Temperature -40 to +125 PDrive 1 Parameter Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. C Gate Driver Electrical Characterization Symbol VDC VUVLO VOVLO Parameter Min. Typ. Max. Supply Voltage 10.2 12 13.2 Under Voltage Lockout 7.7 8.5 9.3 UVLO Hysteresis Unit Test Conditions Turn On, Voltage Going High 0.80 Over Voltage Clamping 13.8 15 VIH High Level Logic Input Voltage 3.5 5.5 VIL Low Level Logic Input Voltage 0 1.5 VIDCM Differential Input Common Mode Range -7 - +12 VIDTH Differential Input Threshold Voltage -200 -125 -50 VOD Differential Output Magnitude 2 3.1 VGATE,HIGH High Level Output Voltage +20 VGATE,LOW Low Level Output Voltage -5 VIOWM Working Isolation Voltage 1000 CISO Isolation Capacitance 16.2 Common Mode Transient Immunity Single-Ended Inputs Differential Inputs mV VID = VPos-Line - VNeg-Line RL=100 V Referenced to Source Referenced to Source VRMS 4.9 CMTI V pF 100 Per Channel kV/s VCM = 1000 V RGIC-ON Output Resistance 1 0.48 0.98 RGIC-OFF Output Resistance 1 0.32 0.63 RGEXT-ON External Turn-on Resistance 2 1.0 RGEXT-OFF External Turn-off Resistance 2 1.0 tON Output Rise Time 174 tOFF Output Fall Time 157 tPHL Propagation Delay (Turn Off) 108 tPHL Propagation Delay (Turn On) 106 RG-Ext = 1 CLoad = 0 nF tBlank Over-current Blanking Time 0.6 RG-Ext = 1 , CLoad = 47 nF Over-current Propagation Delay to FAULT Signal Low 0.5 tPD-FAULT tss Soft-Shutdown Time RSS Soft-Shutdown Resistance RMC Miller Clamp Resistance VMC Miller Clamp Voltage Threshold ns 2 s Gate Drive Buffer Tested at 1 A External SMD Resistor 2512 (6432 Metric) RG-Ext = 1 CLoad = 47 nF From 10% to 90% Does Not Include Blanking 3 3 -3.25 10.2 22 1.1 2.75 -3.0 -2.75 V Tested at 250 mA Tested at 100 mA Referenced to Source 1Output resistance of gate driver IC. 2Additional output resistance is added with SMD resistors. Separate resistors for turn-on and turn-off allowing tunable dynamic performance. 3Soft-Shutdown network will safely turn off the gate in the event an over-current is detected. 2 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. Input Connector Information Pin Number Parameter 1 VDC 2 Common 3 HS-P (*) 4 HS-N (*) 5 LS-P (*) 6 LS-N (*) 7 FAULT- P (*) 8 FAULT- N (*) 9 10 N/A N/A 11 PS-Dis 12 Common 13 PWM-EN 14 15 16 Common Reset Common Description Power supply input pin (+12 V Nominal Input) Common Positive line of 5 V differential high-side PWM signal pair. Terminated Into 120 . Negative line of 5 V differential high-side PWM signal pair. Terminated into 120 . Positive line of 5 V differential low-side PWM signal pair. Terminated into 120 . Negative line of 5 V differential low-side PWM signal pair. Terminated into 120 . Positive line of 5 V differential fault condition signal pair. Drive strength 20 mA. A low state on FAULT indicates when a desaturation fault has occurred. The presence of a fault precludes the gate drive output from going high. Negative line of 5 V differential fault condition signal pair. Drive strength 20 mA. Unused, do not connect. Unused, do not connect. Pull down to disable power supply. Pull up (+5 V) or leave floating to enable. Gate and source are connected with 10 k when disabled. Common Pull down to disable PWM input logic. Pull up (+5 V) or leave floating to enable. Gate driver output will be held low through turn-off gate resistor if power supplies are enabled. Common When a fault exists, bring this pin high (+5 V) to clear the fault. Common * Inputs 3 - 10 are differential pairs. 3 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. Signal Descriptions * PWM Signals: High-side and low-side PWM are RS-422 compatible differential inputs. The termination impedance of the differential receiver is 120 . Overlap protection is provided to prevent both the high-side and low-side gates from turning on simultaneously. The overlap protection should not be used as a dead time generator. * FAULT Signal: The fault signal is a RS-422 compatible differential output with a maximum drive strength of 20mA. A high signal (positive line > negative line) means there are no fault conditions for either gate driver channel. This signal will be low if an overcurrent fault or UVLO fault condition is detected on either channel. A red LED will indicate a fault condition. The LED, DT3, indicates a high-side fault and DT6 indicates a low-side fault. * UVLO Fault: The UVLO circuit detects when the output rails of the isolated DC/DC converter fall below safe operating conditions for the gate driver. A UVLO fault indicates that the potential between the split output rails has fallen below the UVLO active level. The gate for the channel where the fault occurred will be pulled low through RG for the duration of the fault regardless of the PWM input signal. The fault will automatically clear once the potential has risen above the UVLO inactive level. There is hysteresis for this fault to ensure safe operating conditions. The UVLO faults for both channels are combined along with the over-current fault in the FAULT output signal. When there is no UVLO fault present, a green LED indicates a `power good' state. The LED, DT2, indicates a high-side power good status and DT5 indicates a low-side power good status. * Over-Current Fault: An over-current fault is an indication of an over-current event in the SiC power module. The overcurrent protection circuit measures the drain-source voltage, and the fault will indicate if this voltage has risen above a level corresponding to the set current limit. When a fault has occurred the corresponding gate driver channel will be disabled, and the gate will be pulled down through a soft-shutdown resistor, RSS. The drain-source limit can be configured through on-board resistors. The over-current fault is latched upon detection and must be cleared by the user with a high pulse of at least 500 ns on the RESET signal. * PS-DIS: The PS-DIS signal disables the output of the isolated DC/DC converters for the two channels. It is a single-ended input that must be pulled low to turn off the power supplies. With the power supplies disabled, the power module's gate will be connected to the source with a 10 k resistor to prevent unwanted charge-up of the gate capacitance. This signal can be used for startup sequencing. PS-DIS is a +5 V logic-level input; connecting +12 V to the PS-DIS pin will damage the gate driver. * PWM-EN: This is a single-ended input that enables the PWM inputs for both channels. When this signal is pulled down the differential receivers for both channels are disabled and the gates will both be pulled low through RGEXT-OFF. All protection circuitry and power supplies will continue to operate including FAULT and RTD outputs. PWM-EN is a +5 V logic-level input; connecting +12 V to the PWM-EN pin will damage the gate driver. * Over-Voltage and Reverse Polarity Protection: Power input on pin 1 of gate driver connector features a power management IC to protect the gate driver from damage by connecting a power source that exceeds the voltage rating of the gate driver or if the current limit is exceeded. There is also a diode and MOSFET in-line with the power input to protect against connecting a power source with positive and negative polarity reversed. 4 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. Truth Table PWM PWM-EN PS-DIS RESET H H or Z H or Z L Overcurrent/ UVLO No L H or Z H or Z L X L H or Z X X X H or Z FAULT Output H H No H L L No H L L X No L Z H or Z L Yes L L H = High | L = Low | X = Irrelevant | Z = High Impedance Gate Driver Interface 5 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. Function Block Diagram 6 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. Over-Current Trip Level The over-current (OC) fault detection circuit measures the on-state VDS voltage across each switch position and triggers a fault condition if the voltage rises above a set level. The internal comparator trip voltage in the ADuM4135 gate driver IC is 9 V. Considering the forward voltage of the high-voltage blocking diodes and a tunable Zener diode, the over-current trip level is calculated with the following equation: V OC-Trip = 9V - V Z - 2V F where the forward voltage of the high-voltage diodes, VF, is approximately 0.5 V, and the Zener voltage, VZ, included on the gate driver is 5.1 V (Nexperia(R) PDZ5.1BGW). As shipped, the over-current trip level is 2.9 V. If it is desired to change the overcurrent trip level, the Zener diode should be in a SOD123 package such as the diodes in the PDZ-GW series from Nexperia USA Inc. The Zener diodes are labelled DB2 and DB10 on the PCB. + VZ - + VF - + VF + + Fault Comparator (9 V) - Tunable OC-Trip with Zener Diode VOC-Trip - To select an appropriate over-current trip level, refer to the ID vs. VDS output characteristic curves in the module datasheet. The HS-OC connector, JT1, cannot be left floating as the over-current fault will trip immediately when the high-side gate is actuated. If bench-top testing of the gate driver is required, it is acceptable to short the HS-OC connection to the high-side source to prevent the over-current fault from tripping. The same phenomenon exists for the low-side, and it is acceptable to short the high-side source (low-side drain) to the low-side source for bench-top testing. The over-current fault condition must be acknowledged with the Reset signal to return to normal operation of the gate driver. 7 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. Timing Information Gate Timing Diagram Over-Current Protection Timing Diagram 8 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. Input Connector Information * 16 Positions Header, 0.100" (2.54mm) Pitch, Through Hole, Gold (SBH11-PBPC-D08-ST-BK) Suggested Mating Parts * 16 Position Rectangular Header, IDC, Gold, 28 AWG (SFH210-PPPC-D08-ID-BK) * 16 Position Header, 0.100" (2.54mm) Pitch, Through Hole, Gold (SFH11-PBPC-D08-RA-BK) * 16 Position Header, 0.100" (2.54mm) Pitch, Through Hole, Right Angle, Gold (SFH11-PBPC-D08-RA-BK) Output Connector Information * Quick Connect Female Connector, 0.110" (2.79mm), Non-Insulated (Keystone(R) 3534) Power Estimates The gate driver power required is calculated using the formula below. The gate charge is dependent on the datasheets of the module being driven. Once the required gate driver power is calculated, the required input power can be calculated from the efficiency curves on the power supplies datasheet. This calculation is for one channel of the gate driver. Psw = QG * FSW * VPS Psw: QG: FSW: VPS: gate driver power (per channel) total gate charge (MOSFET gate charge x number of MOSFETs per switch position) switching frequency difference in isolated power supply voltage rails (VPS,HIGH - VPS,LOW) Example: Calculate the maximum switching frequency for CAS300M12BM2. Psw QG VPS,HIGH VPS,LOW VPS 2 W (rated output power of isolated power supply on gate driver) 1025 nC (provided in CAS300M12BM2 datasheet) 20 V (isolated power supply's positive output voltage) -5 V (isolated power supply's negative output voltage) 25 V 2 W = 1025 nC * FSW-Max * 25 V FSW-Max 75 kHz with margin Supporting Links & Tools * 1200 V BM2 SiC Half-Bridge Module Platform * CGD12HB00D: Differential Transceiver Board 9 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association. Dimensions Dimensions ([in] mm) Important Notes * This Cree-designed gate driver hardware for Cree components is meant to be used as an evaluation tool in a lab setting and to be handled and operated by highly qualified technicians or engineers. The hardware is not designed to meet any particular safety standards and the tool is not a production qualified assembly. * Each part that is used in this gate driver and is manufactured by an entity other than Cree or one of Cree's affiliates is provided "as is" without warranty of any kind, including but not limited to any warranty of non-infringement, merchantability, or fitness for a particular purpose, whether express or implied. There is no representation that the operation of each such part will be uninterrupted or error free. * This product has not been designed or tested for use in, and is not intended for use in, applications implanted into the human body nor in applications in which failure of the product could lead to death, personal injury or property damage, including but not limited to equipment used in the operation of nuclear facilities, life-support machines, cardiac defibrillators or similar emergency medical equipment, aircraft navigation or communication or control systems, or air traffic control systems. * The SiC MOSFET module switches at speeds beyond what is customarily associated with IGBT-based modules. Therefore, special precautions are required to realize optimal performance. The interconnection between the gate driver and module housing needs to be as short as possible. This will afford optimal switching time and avoid the potential for device oscillation. Also, great care is required to insure minimum inductance between the module and DC link capacitors to avoid excessive VDS overshoot. 10 Rev. -, 2020-03-20 CGD1200HB2P-BM2 4600 Silicon Dr., Durham, NC 27703 Copyright (c)2020 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree(R), the Cree logo, Wolfspeed(R), and the Wolfspeed logo are registered trademarks of Cree, Inc. Other trademarks, product, and company names are the property of their respective owners and do not imply specific product and/or vendor endorsement, sponsorship or association.