LTC6900
1
6900fa
TYPICAL APPLICATION
DESCRIPTION
Low Power, 1kHz to 20MHz
Resistor Set SOT-23 Oscillator
The LTC
®
6900 is a precision, low power oscillator that is
easy to use and occupies very little PC board space. The
oscillator frequency is programmed by a single external
resistor (RSET). The LTC6900 has been designed for high
accuracy operation (≤1.5% frequency error) without the
need for external trim components.
The LTC6900 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/fall
times and rail-to-rail switching. The frequency-setting
resistor can vary from 10k to 2M to select a master
oscillator frequency between 100kHz and 20MHz (5V
supply). The three-state DIV input determines whether the
master clock is divided by 1, 10 or 100 before driving the
output, providing three frequency ranges spanning 1kHz
to 20MHz (5V supply). The LTC6900 features a proprietary
feedback loop that linearizes the relationship between RSET
and frequency, eliminating the need for tables to calculate
frequency. The oscillator can be easily programmed using
the simple formula outlined below:
fOSC =10MHz •20k
N•RSET
⎛
⎝
⎜⎞
⎠
⎟,N=
100,
10,
1,
⎧
⎨
⎪
⎩
⎪
DIV Pin =V+
DIV Pin =Open
DIV Pin =GND
Clock Generator
FEATURES
APPLICATIONS
n One External Resistor Sets the Frequency
n 1kHz to 20MHz Frequency Range
n 500μA Typical Supply Current, VS = 3V, 3MHz
n Frequency Error ≤1.5% Max, 5kHz to 10MHz
(TA = 25°C)
n Frequency Error ≤2% Max, 5kHz to 10MHz
(TA = 0°C to 70°C)
n ±40ppm/°C Temperature Stability
n 0.04%/V Supply Stability
n 50% ±1% Duty Cycle 1kHz to 2MHz
n 50% ±5% Duty Cycle 2MHz to 10MHz
n Fast Start-Up Time: 50µs to 1.5ms
n 100 CMOS Output Driver
n Operates from a Single 2.7V to 5.5V Supply
n Low Profi le (1mm) ThinSOT™ Package
n Portable and Battery-Powered Equipment
n PDAs
n Cell Phones
n Low Cost Precision Oscillator
n Charge Pump Driver
n Switching Power Supply Clock Reference
n Clocking Switched Capacitor Filters
n Fixed Crystal Oscillator Replacement
n Ceramic Oscillator Replacement
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
RSET vs Desired Output Frequency
V+
1
2
3
5
1kHz ≤ fOSC ≤ 20MHz
5V
5V, N = 100
10k ≤ RSET ≤ 2M
0.1μF
6900 TA01a
4
GND
LTC6900
SET
OUT
DIV OPEN, N = 10
N = 1
fOSC = 10MHz • 20k
N • RSET
()
DESIRED OUTPUT FREQUENCY (Hz)
10
RSET (kΩ)
100
1k 100k 1M 10M
6900 TA01b
110k
10000
1000
100M
÷100 ÷10 ÷1
LTC6900
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PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS
Supply Voltage (V+) to GND .........................–0.3V to 6V
DIV to GND .................................... –0.3V to (V+ + 0.3V)
SET to GND ....................................–0.3V to (V+ + 0.3V)
Operating Temperature Range (Note 8)
LTC6900C ............................................–40°C to 85°C
LTC6900I .............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
(Note 1)
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
1
2
3
V+
GND
SET
5
4
OUT
DIV
TJMAX = 150°C, θJA = 256°C/W
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC6900CS5#PBF LTC6900CS5#TRPBF LTZM 5-Lead Plastic TSOT-23 –40°C to 85°C
LTC6900IS5#PBF LTC6900IS5#TRPBF LTZM 5-Lead Plastic TSOT-23 –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. V+ = 2.7V to 5.5V, RL= 5k, CL = 5pF, Pin 4 = V+ unless otherwise noted.
All voltages are with respect to GND.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
∆f Frequency Accuracy (Notes 2, 3) V+ = 5V 5kHz ≤ f ≤ 10MHz
5kHz ≤ f ≤ 10MHz, LTC6900C
5kHz ≤ f ≤ 10MHz, LTC6900I
1kHz ≤ f < 5kHz
10MHz < f ≤ 20MHz
●
●
±0.5
±2
±2
±1.5
±2.0
±2.5
%
%
%
%
%
V+ = 3V 5kHz ≤ f ≤ 10MHz
5kHz ≤ f ≤ 10MHz, LTC6900C
5kHz ≤ f ≤ 10MHz, LTC6900I
1kHz ≤ f < 5kHz
●
●
±0.5
±2
±1.5
±2.0
±2.5
%
%
%
%
RSET Frequency-Setting Resistor Range |∆f| < 1.5% V+ = 5V
V
+ = 3V 20
20 400
400 k
k
∆f/∆T Frequency Drift Overtemperature
(Note 3) RSET = 63.2k ●±0.004 %/°C
∆f/∆V Frequency Drift Over Supply (Note 3) V+ = 3V to 5V, RSET = 63.2k ●0.04 0.1 %/V
Timing Jitter (Note 4) Pin 4 = V+, 20k ≤ RSET ≤ 400k
Pin 4 = Open, 20k ≤ RSET ≤ 400k
Pin 4 = 0V, 20k ≤ RSET ≤ 400k
0.1
0.2
0.6
%
%
%
Long-Term Stability of Output
Frequency 300 ppm/√kHr
Duty Cycle (Note 7) Pin 4 = V+ or Open (DIV Either by 100 or 10)
Pin 4 = 0V (DIV by 1), RSET = 20k to 400k
●
●
49
45 50
50 51
55 %
%
LTC6900
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ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Frequencies near 100kHz and 1MHz may be generated using two
different values of RSET (see the Selecting the Divider Setting Resistor
paragraph in the Applications Information section). For these frequencies,
the error is specifi ed under the following assumption: 20k < RSET ≤ 200k.
Note 3: Frequency accuracy is defi ned as the deviation from the
fOSC equation.
Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to
the mean of the period. This specifi cation is based on characterization and
is not 100% tested. Also, see the Peak-to-Peak Jitter vs Output Frequency
curve in the Typical Performance Characteristics section.
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. V+ = 2.7V to 5.5V, RL= 5k, CL = 5pF, Pin 4 = V+ unless otherwise noted.
All voltages are with respect to GND.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V+Operating Supply Range ●2.7 5.5 V
ISPower Supply Current RSET = 400k, Pin 4 = V+, RL = ∞ V+ = 5V
fOSC = 5kHz V+ = 3V
●
●
0.32
0.29 0.42
0.38 mA
mA
RSET = 20k, Pin 4 = 0V, RL = ∞ V+ = 5V
fOSC = 10MHz V+ = 3V
●
●
0.92
0.68 1.20
0.86 mA
mA
VIH High Level DIV Input Voltage ●V+ – 0.4 V
VIL Low Level DIV Input Voltage ●0.5 V
IDIV DIV Input Current (Note 5) Pin 4 = V+ V+ = 5V
Pin 4 = 0V V+ = 5V
●
●–4 2
–2 4µA
µA
VOH High Level Output Voltage (Note 5) V+ = 5V IOH = –1mA
I
OH = –4mA
●
●
4.8
4.5 4.95
4.8 V
V
V+ = 3V IOH = –1mA
I
OH = –4mA
●
●
2.7
2.2 2.9
2.6 V
V
VOL Low Level Output Voltage (Note 5) V+ = 5V IOL = 1mA
I
OL = 4mA
●
●
0.05
0.2 0.15
0.4 V
V
V+ = 3V IOL = 1mA
I
OL = 4mA
●
●
0.1
0.4 0.3
0.7 V
V
trOUT Rise Time
(Note 6) V+ = 5V Pin 4 = V+ or Floating, RL = ∞
Pin 4 = 0V, RL = ∞ 14
7ns
ns
V+ = 3V Pin 4 = V+ or Floating, RL = ∞
Pin 4 = 0V, RL = ∞ 19
11 ns
ns
tfOUT Fall Time
(Note 6) V+ = 5V Pin 4 = V+ or Floating, RL = ∞
Pin 4 = 0V, RL = ∞ 13
6ns
ns
V+ = 3V Pin 4 = V+ or Floating, RL = ∞
Pin 4 = 0V, RL = ∞
19
10
ns
ns
Note 5: To conform with the Logic IC Standard convention, current out of
a pin is arbitrarily given as a negative value.
Note 6: Output rise and fall times are measured between the 10% and 90%
power supply levels. These specifi cations are based on characterization.
Note 7: Guaranteed by 5V test.
Note 8: The LTC6900C is guaranteed to meet specifi ed performance from
0°C to 70°C. The LTC6900C is designed, characterized and expected to
meet specifi ed performance from – 40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6900I is guaranteed to meet
specifi ed performance from –40°C to 85°C.
LTC6900
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TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current
vs Output Frequency
Output Resistance
vs Supply Voltage
LTC6900 Output Operating at
20MHz, VS = 5V
LTC6900 Output Operating at
10MHz, VS = 3V
Frequency Variation vs RSET
Frequency Variation Over
Temperature
Peak-to-Peak Jitter
vs Output Frequency
RSET (Ω)
1k
VARIATION (%)
4
3
2
1
0
–1
–2
–3
–4 10k 100k 1M
6900 G01
TYPICAL LOW
TYPICAL HIGH
TA = 25°C
GUARANTEED LIMITS APPLY OVER
20kΩ ≤ RSET ≤ 400kΩ
TEMPERATURE (°C)
–40
VARIATION (%)
1.00
0.75
0.50
0.25
0
–0.25
–0.50
–0.75
–1.00
6900 G02
–20 0 20 40 60 80
TYPICAL
LOW
RSET = 63.4k
÷1 OR ÷10 OR ÷100
TYPICAL
HIGH
OUTPUT FREQUENCY (Hz)
JITTER (%P-P)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
6900 G03
1k 100k 1M10k 10M
÷1, VA = 3V
÷1, VA = 5V
÷10
÷100
SUPPLY VOLTAGE (V)
2.5 3.0
40
OUTPUT RESISTANCE (Ω)
80
140
3.5 4.5 5.0
6900 G05
60
120
100
4.0 5.5 6.0
OUTPUT SINKING CURRENT
OUTPUT SOURCING CURRENT
TA = 25°C
12.5ns/DIV
0V
6900 G06
1V/DIV
V+ = 5V, RSET = 10k, CL = 10pF
25ns/DIV
0V
6900 G07
1V/DIV
V+ = 3V, RSET = 20k, CL = 10pF
OUTPUT FREQUENCY (Hz)
SUPPLY CURRENT (mA)
2.0
1.5
1.0
0.5
0
6900 G04
÷100, 3V ÷10, 3V ÷1, 3V
÷100, 5V
÷10, 5V
÷1, 5V
TA = 25°C
CL = 5pF
01k 10k 100k 1M 10M
LTC6900
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PIN FUNCTIONS
V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This supply
must be kept free from noise and ripple. It should be by-
passed directly to a ground plane with a 0.1µF capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane
for best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V+ deter-
mines the oscillator frequency. The voltage on this pin is
held by the LTC6900 to approximately 1.1V below the V+
voltage. For best performance, use a precision metal fi lm
resistor with a value between 10k and 2M and limit
the capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the value
of N in the frequency equation. Pin 4 should be tied to GND
for the ÷1 setting, the highest frequency range. Floating
Pin 4 divides the master oscillator by 10. Pin 4 should be
tied to V+ for the ÷100 setting, the lowest frequency range.
To detect a fl oating DIV pin, the LTC6900 attempts to pull
the pin toward midsupply. Therefore, driving the DIV pin
high requires sourcing approximately 2µA. Likewise, driv-
ing DIV low requires sinking 2µA. When Pin 4 is fl oated,
it should preferably be bypassed by a 1nF capacitor to
ground or it should be surrounded by a ground shield to
prevent excessive coupling from other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5k and/
or 10pF loads. Heavier loads may cause inaccuracies due
to supply bounce at high frequencies. Voltage transients,
coupled into Pin 5, above or below the LTC6900 power
supplies will not cause latchup if the current into/out of
the OUT pin is limited to 50mA.
BLOCK DIAGRAM
–
+
1
3
GAIN = 1
V+
VBIAS
IRES
IRES
RSET SET
GND
PATENT PENDING
MASTER OSCILLATOR
PROGRAMMABLE
DIVIDER (N)
(÷1, 10 OR 100)
VRES = (V+ – VSET) = 1.1V TYPICALLY
IRES
(V+ – VSET)
ƒMO = 10MHz • 20kΩ •
THREE-STATE
INPUT DETECT
GND
V
+
2µA
6900 BD
2µA
OUT
DIVIDER
SELECT
5
DIV 4
2
+
–
+
–
LTC6900
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OPERATION
As shown in the Block Diagram, the LTC6900’s master os-
cillator is controlled by the ratio of the voltage between the
V+ and SET pins and the current (IRES) is entering the SET
pin. The voltage on the SET pin is forced to approximately
1.1V below V+ by the PMOS transistor and its gate bias
voltage. This voltage is accurate to ±8% at a particular
input current and supply voltage (see Figure 1).
A resistor RSET
, connected between the V+ and SET pins,
“locks together” the voltage (V+ – VSET) and current, IRES,
variation. This provides the LTC6900’s high precision. The
master oscillation frequency reduces to:
ƒMO =10MHz • 20kΩ
RSET
⎛
⎝
⎜⎞
⎠
⎟
The LTC6900 is optimized for use with resistors between
10k and 2M, corresponding to master oscillator frequen-
cies between 100kHz and 20MHz.
To extend the output frequency range, the master oscillator
signal may be divided by 1, 10 or 100 before driving OUT
(Pin 5). The divide-by value is determined by the state of
the DIV input (Pin 4). Tie DIV to GND or drive it below 0.5V
to select ÷1. This is the highest frequency range, with the
master output frequency passed directly to OUT. The DIV
pin may be fl oated or driven to midsupply to select ÷10,
the intermediate frequency range. The lowest frequency
range, ÷100, is selected by tying DIV to V+ or driving it to
within 0.4V of V+. Figure 2 shows the relationship between
RSET
, divider setting and output frequency, including the
overlapping frequency ranges near 100kHz and 1MHz.
The CMOS output driver has an on resistance that is typi-
cally less than 100. In the ÷1 (high frequency) mode,
the rise and fall times are typically 7ns with a 5V supply
and 11ns with a 3V supply. These times maintain a clean
square wave at 10MHz (20MHz at 5V supply). In the ÷10
and ÷100 modes, where the output frequency is much lower,
slew rate control circuitry in the output driver increases
the rise/fall times to typically 14ns for a 5V supply and
19ns for a 3V supply. The reduced slew rate lowers EMI
(electromagnetic interference) and supply bounce.
Figure 1. V+ – VSET Variation with IRES Figure 2. RSET vs Desired Output Frequency
IRES (µA)
10.1
0.8
VRES = V+ – VSET
1.2
1.3
1.4
10 100 1000
6900 F01
1.1
1.0
0.9
V+ = 5V
V+ = 3V
DESIRED OUTPUT FREQUENCY (Hz)
10
RSET (kΩ)
100
1k 100k 1M 10M
6900 F02
110k
10000
1000
100M
÷100 ÷10 ÷1
LTC6900
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APPLICATIONS INFORMATION
SELECTING THE DIVIDER SETTING AND RESISTOR
The LTC6900’s master oscillator has a frequency range
spanning 0.1MHz to 20MHz. However, accuracy may suffer
if the master oscillator is operated at greater than 10MHz
with a supply voltage lower than 4V. A programmable
divider extends the frequency range to greater than three
decades. Table 1 describes the recommended frequencies
for each divider setting. Note that the ranges overlap; at
some frequencies there are two divider/resistor combina-
tions that result in the desired frequency.
In general, any given oscillator frequency (fOSC) should
be obtained using the lowest master oscillator frequency.
Lower master oscillator frequencies use less power and
are more accurate. For instance, fOSC = 100kHz can be
obtained by either RSET = 20k, N = 100, master oscillator =
10MHz or RSET = 200k, N = 10, master oscillator = 1MHz.
The RSET = 200k approach is preferred for lower power
and better accuracy.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTING FREQUENCY RANGE
÷1 ⇒ DIV (Pin 4) = GND >500kHz*
÷10 ⇒ DIV (Pin 4) = Floating 50kHz to 1MHz
÷100 ⇒ DIV (Pin 4) = V+< 100kHz
*
At master oscillator frequencies greater than 10MHz (RSET < 20k),
the LTC6900 may experience reduced accuracy with a supply voltage
less than 4V.
After choosing the proper divider setting, determine the
correct frequency-setting resistor. Because of the linear
correspondence between oscillation period and resistance,
a simple equation relates resistance with frequency.
RSET =20k • 10MHz
N•f
OSC
⎛
⎝
⎜⎞
⎠
⎟, N =
100
10
1
⎧
⎨
⎪
⎩
⎪
(RSETMIN = 10k, RSETMAX = 2M)
Any resistor, RSET
, tolerance adds to the inaccuracy of the
oscillator, fOSC.
ALTERNATIVE METHODS OF SETTING THE OUTPUT
FREQUENCY OF THE LTC6900
The oscillator may be programmed by any method that
sources a current into the SET pin (Pin 3). The circuit in
Figure 3 sets the oscillator frequency using a programmable
current source and in the expression for fOSC, the resistor
RSET is replaced by the ratio of 1.1V/ICONTROL. As already
explained in the Operation section, the voltage difference
between V+ and SET is approximately 1.1V, therefore, the
Figure 3 circuit is less accurate than if a resistor controls
the oscillator frequency.
Figure 4 shows the LTC6900 confi gured as a VCO. A voltage
source is connected in series with an external 20k resis-
tor. The output frequency, fOSC, will vary with VCONTROL,
that is the voltage source connected between V+ and the
SET pin. Again, this circuit decouples the relationship
between the input current and the voltage between V+
and SET; the frequency accuracy will be degraded. The
oscillator frequency, however, will monotonically increase
with decreasing VCONTROL.
Figure 3. Current Controlled Oscillator
Figure 4. Voltage Controlled Oscillator
V+
1
2
3
5
182kHz TO 18MHz (TYPICALLY ±8%)
V+
0.1µF
ICONTROL
1µA TO 100µA
6900 F03
4
GND
N = 1
LTC6900
SET
OUT
DIV
10MHz
N
ƒOSC ••I
CONTROL
ICONTROL EXPRESSED IN (A)
20kΩ
1.1V
V+
1
2
3
5
V+
0.1µF
RSET
20k
VCONTROL
0V TO 1.1V
6900 F04
4
GND
N = 1
LTC6900
SET
OUT
DIV
+
–
10MHz
N
ƒOSC • • 1 – VCONTROL
1.1V
20k
RSET
()
TYPICAL fOSC ACCURACY
±0.5%, VCONTROL = 0V
±8%, VCONTROL = 0.5V
LTC6900
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APPLICATIONS INFORMATION
POWER SUPPLY REJECTION
Low Frequency Supply Rejection (Voltage Coeffi cient)
Figure 5 shows the output frequency sensitivity to power
supply voltage at several different temperatures. The
LTC6900 has a guaranteed voltage coeffi cient of 0.1%/V
but, as Figure 5 shows, the typical supply sensitivity is
twice as low.
High Frequency Power Supply Rejection
The accuracy of the LTC6900 may be affected when its
power supply generates signifi cant noise with a frequency
content in the vicinity of the programmed value of fOSC. If a
switching power supply is used to power the LTC6900, and
if the ripple of the power supply is more than 20mV, make
sure the switching frequency and its harmonics are not
related to the output frequency of the LTC6900. Otherwise,
the oscillator may show additional frequency error.
If the LTC6900 is powered by a switching regulator and
the switching frequency or its harmonics coincide with
the output frequency of the LTC6900, the jitter of the
oscillator output may be affected. This phenomenon will
become noticeable if the switching regulator exhibits
ripples beyond 30mV.
START-UP TIME
The start-up time and settling time to within 1% of the
fi nal value can be estimated by tSTART ≅ RSET(3.7µs/k)
+ 10µs. Note the start-up time depends on RSET and it is
independent from the setting of the divider pin. For in-
stance with RSET = 100k, the LTC6900 will settle with 1%
of its 200kHz fi nal value (N = 10) in approximately 380µs.
Figure 6 shows start-up times for various RSET resistors.
Figure 7 shows an application where a second set resistor
RSET2 is connected in parallel with set resistor RSET1 via
switch S1. When switch S1 is open, the output frequency
of the LTC6900 depends on the value of the resistor RSET1.
When switch S1 is closed, the output frequency of the
LTC6900 depends on the value of the parallel combination
of RSET1 and RSET2.
The start-up time and settling time of the LTC6900 with
switch S1 open (or closed) is described by tSTART shown
above. Once the LTC6900 starts and settles, and switch
S1 closes (or opens), the LTC6900 will settle to its new
output frequency within approximately 70µs.
Jitter
The Peak-to-Peak Jitter vs Output Frequency graph, in the
Typical Performance Characteristics section, shows the
typical clock jitter as a function of oscillator frequency and
power supply voltage. The capacitance from the SET pin,
(Pin 3), to ground must be less than 10pF. If this require-
ment is not met, the jitter will increase.
Figure 5. Supply Sensitivity Figure 6. Start-Up Time
SUPPLY VOLTAGE (V)
2.5
–0.05
FREQUENCY DEVIATION (%)
0
0.05
0.10
0.15
3.0 3.5 4.0 4.5
6900 F05
5.0 5.5
85°C
–40°C
25°C
RSET = 63.2k
PIN 4 = FLOATING (÷10)
TIME AFTER POWER APPLIED (µs)
0
FREQUENCY ERROR (%)
20
30
40
600
400k
1000
6900 F06
10
0
–10 200 400 800
50
60
70
63.2k
20k
TA = 25°C
V+ = 5V
LTC6900
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APPLICATIONS INFORMATION
A Ground Referenced Voltage Controlled Oscillator
The LTC6900 output frequency can also be programmed by
steering current in or out of the SET pin, as conceptually
shown in Figure 8. This technique can degrade accuracy
as the ratio of (V+ – VSET) / IRES is no longer uniquely
dependent of the value of RSET
, as shown in the LTC6900
Block Diagram. This loss of accuracy will become noticeable
when the magnitude of IPROG is comparable to IRES. The
frequency variation of the LTC6900 is still monotonic.
Figure 9 shows how to implement the concept shown in
Figure 8 by connecting a second resistor, RIN, between the
SET pin and a ground referenced voltage source, VIN.
For a given power supply voltage in Figure 9, the output
frequency of the LTC6900 is a function of VIN, RIN, RSET
and (V+ – VSET) = VRES:
fOSC =10MHz
N•20k
RIN RSET
•
1+VIN −V+
()
VRES
•1
1+RIN
RSET
⎛
⎝
⎜
⎜
⎜
⎜
⎞
⎠
⎟
⎟
⎟
⎟
⎡
⎣
⎢
⎢
⎢
⎢
⎤
⎦
⎥
⎥
⎥
⎥
(1)
When VIN = V+, the output frequency of the LTC6900 as-
sumes the highest value and it is set by the parallel com-
bination of RIN and RSET
. Also note, the output frequency,
fOSC, is independent of the value of VRES = (V+ – VSET) so
the accuracy of fOSC is within the data sheet limits.
When VIN is less than V+, and expecially when VIN ap-
proaches the ground potential, the oscillator frequency,
fOSC, assumes its lowest value and its accuracy is affected
by the change of VRES = (V+ – VSET). At 25°C VRES varies
by ±8%, assuming the variation of V+ is ±5%. The tem-
perature coeffi cient of VRES is 0.02%/°C.
By manipulating the algebraic relation for fOSC above, a
simple algorithm can be derived to set the values of external
resistors RSET and RIN, as shown in Figure 9.
1. Choose the desired value of the maximum oscillator
frequency, fOSC(MAX), occurring at maximum input
voltage VIN(MAX) ≤ V+.
2. Set the desired value of the minimum oscillator fre-
quency, fOSC(MIN), occurring at minimum input voltage
VIN(MIN) ≥ 0.
3. Choose VRES = 1.1 and calculate the ratio of RIN/RSET
from the following:
RIN
RSET
=
VIN(MAX) −V+
()
−fOSC(MAX)
fOSC(MIN)
⎛
⎝
⎜⎞
⎠
⎟VIN(MIN) −V+
()
VRES
fOSC(MAX)
()
fOSC(MIN)
−1
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
−1
(2)
Figure 7
V+
1
2
RSET1
RSET2 3
S1
5
V+
6900 F07
4
GND
LTC6900
3V OR 5V
SET
OUT
DIV ÷10
÷100
÷1
fOSC = 10MHz •
OR
()
20k
N • RSET1
fOSC = 10MHz •
()
20k
N • RSET1//RSET2
Figure 8. Concept for Programming via Current Steering Figure 9. Implementation of Concept Shown in Figure 8
V+
1
2
RSET
IPR
3
5
5V
V+
6900 F08
4
GND
LTC6900
0.1µF
OPEN
SET
OUT
DIV ÷10
÷100
÷1
IRES
V+
1
2
RSET
VRES
RIN
VIN
3
5
5V
V+
6900 F09
4
GND
LTC6900
0.1µF
fOSC
OPEN
SET
OUT
DIV ÷10
÷100
÷1
+
–
+
–
LTC6900
10
6900fa
APPLICATIONS INFORMATION
Once RIN/RSET is known, calculate RSET from:
RSET =10MHz
N•20k
fOSC(MAX)
•
VIN(MAX) −V+
()
+VRES 1+RIN
RSET
⎛
⎝
⎜⎞
⎠
⎟
VRES
RIN
RSET
⎛
⎝
⎜⎞
⎠
⎟
⎡
⎣
⎢
⎢
⎢
⎢
⎢
⎤
⎦
⎥
⎥
⎥
⎥
⎥
(3)
Example 1:
In this example, the oscillator output frequency has small
excursions. This is useful where the frequency of a system
should be tuned around some nominal value.
Let V+ = 3V, fOSC(MAX) = 2MHz for VIN(MAX) = 3V and
fOSC(MIN) = 1.5MHz for VIN = 0V. Solve for RIN/RSET by
Equation (2), yielding RIN/RSET = 9.9/1. RSET = 110.1k by
Equation (4). RIN = 9.9RSET = 1.089M. For standard resis-
tor values, use RSET = 110k (1%) and RIN = 1.1M (1%).
Figure 10 shows the measured fOSC vs VIN. The 1.5MHz
to 2MHz frequency excursion is quite limited, so the curve
of fOSC vs VIN is linear.
Example 2:
Vary the oscillator frequency by one octave per volt. As-
sume fOSC(MIN) = 1MHz and fOSC(MAX) = 2MHz, when the
input voltage varies by 1V. The minimum input voltage is
half supply, that is VIN(MIN) = 1.5V, VIN(MAX) = 2.5V and
V+ = 3V.
Equation (2) yields RIN/RSET = 1.273 and Equation (3) yields
RSET = 142.8k. RIN = 1.273RSET = 181.8k. For standard
resistor values, use RSET = 143k (1%) and RIN = 182k
(1%). Figure 11 shows the measured fOSC vs VIN. For VIN
higher than 1.5V, the VCO is quite linear; nonlinearities
occur when VIN becomes smaller than 1V, although the
VCO remains monotonic.
Maximum VCO Modulation Bandwidth
The maximum VCO modulation bandwidth is 25kHz; that
is, the LTC6900 will respond to changes in VIN at a rate
up to 25kHz. In lower frequency applications however, the
modulation frequency may need to be limited to a lower
rate to prevent an increase in output jitter. This lower limit
is the master oscillator frequency divided by 20, (fOSC/20).
In general, for minimum output jitter the modulation fre-
quency should be limited to fOSC/20 or 25kHz, whichever
is less. For best performance at all frequencies, the value
for fOSC should be the master oscillator frequency (N = 1)
when VIN is at the lowest level.
Figure 10. Output Frequency vs Input Voltage Figure 11. Output Frequency vs Input Voltage
VIN (V)
00.5 1 1.5 2 2.5 3
fOSC (MHz)
6900 F10
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
1.55
1.50
RIN = 1.1M
RSET = 110k
V+ = 3V
N = 1
VIN (V)
00.5 1 1.5 2 2.5 3
fOSC (kHz)
6900 F11
3000
2500
2000
1500
1000
500
0
RIN = 182k
RSET = 143k
V+ = 3V
N = 1
LTC6900
11
6900fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3) S5 TSOT-23 0302 REV B
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX
0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
APPLICATIONS INFORMATION
Example 3:
V+ = 3V, fOSC(MAX) = 5MHz, fOSC(MIN) = 4MHz, N = 1
VIN(MAX) = 2.5V, VIN(MIN) = 0.5V
RIN/RSET = 8.5, RSET = 43.2k, RIN = 365k
Maximum modulation bandwidth is the lesser of 25kHz
or fOSC(MIN)/20 (4MHz/20 = 200kHz)
Maximum VIN modulation frequency = 25kHz
Example 4:
V+ = 3V, fOSC(MAX) = 400kHz, fOSC(MIN) = 200kHz, N = 10
VIN(MAX) = 2.5V, VIN(MIN) = 0.5V
RIN/RSET = 3.1, RSET = 59k, RIN = 182k
Maximum modulation bandwidth is the lesser of 25kHz or
fOSC(MIN)/20 calculated at N =1 (2MHz/20 = 100kHz)
Maximum VIN modulation frequency = 25kHz
Table 2. Variation of VRES for Various Values of RIN || RSET
RIN || RSET (VIN = V+)V
RES, V+ = 3V VRES, V+ = 5V
20k 0.98V 1.03V
40k 1.03V 1.08V
80k 1.07V 1.12V
160k 1.1V 1.15V
320k 1.12V 1.17V
VRES = Voltage across RSET
Note: All of the calculations above assume VRES = 1.1V, although VRES
≈ 1.1V. For completeness, Table 2 shows the variation of VRES against
various parallel combinations of RIN and RSET (VIN = V+). Calulate fi rst
with VRES ≈ 1.1V, then use Table 2 to get a better approximation of VRES,
then recalculate the resistor values using the new value for VRES.
LTC6900
12
6900fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2002
LT 0709 REV A • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
PART NUMBER DESCRIPTION COMMENTS
LTC1799 1kHz to 30MHz ThinSOT Oscillator Identical Pinout, Higher Frequency Operation
Temperature-to-Frequency Converter
Output Frequency vs Temperature
V+
1
2
3
5fOSC = •
10MHz
10
5V
RT
100k
THERMISTOR
C1
0.1µF
6900 TA02
4
RT: YSI 44011 800 765-4974
GND
LTC6900
SET
OUT
DIV
20k
RT
6900 TA03
1400
1200
1000
800
600
400
200
0
–20–100 102030405060708090
TEMPERATURE (°C)
FREQUENCY (kHz)
MAX
TYP
MIN
