Page 4/12 alpha mi croelectronics gm bh October 2000
VDDC
At this pin a forward voltage of the dumping diode D1 reduces the supply voltage VDD.
This pin must be connected to a back-up capacitor.
It is allowed to connect the power supply directly to the pin VDDC.
In this case the protection against EMC and against reverse polarity of the supply voltage is cancelled.
The threshold value for the detecting of the undervoltage decreases by a forward voltage.
O5V
The reference regulator 5 V must wired-up to a back-up capacitor.
The output may be loaded with 5 mA maximally. If the output O5V is reloaded more than 1.5 mA
deviations are permitted data.
O12V
The 12 V-voltage source is a source follower stage M1 with RDS(on)M1 of about 60 Ω.
From VDD = 0 to 14 V the output voltage shows a linear dependence on the supply voltage.
The output may be loaded with 10 mA maximally.
Besides you must keep the dependence of load for the voltage. If the output O12V is reloaded deviations
are permitted data.
OUT
The closing resistors RDS(on) of the push-pull driver transistors M2 and M3 are about
45 Ω respectively 20 Ω. The push-pull driver transistors can drive at Ta = 25 °C reloading currents of
about 100 mA. Without load the maximal output voltage of the push-pull driver is identical with the
voltage VO12V.
The output is internal protected with a 15 V - Zener diode against external overvoltage.
The resistive load must not exceed 10 mA.
The current limititation of the external transistor M4, e.g. against short-circuit, must be external guarded.
OVP
The input OVP is internal connected by a 42 V - Zener diode and three forward diodes to the output OUT.
With that it is possible to protect the external transistors M4 in the switched off condition against excess
voltages by clamping the drain of this transistor to typically (44 V + VGSM4).
The threshold for the protection against overvoltage is reached if a current > 70 µA flows in the input OVP.
In result the internal Low side driver transistor M3 switches off. After that the current loads the gate of the
external transistor to VGSM4 and switches it on.
At use of external transistors with a higher breakdown voltage the overvoltage protection can be modified
by an external Zener diode.
The function overvoltage protection is dimensioning at inductive loads. With the driving other loads limit
the current in the Pin OVP if necessary.
IN
Input voltages > 4 V are logical high and input voltages < 2,0 V are logical Low.
If the input is open (non-connected) the internal value is recognized as logical high.
An internal RC filter with a delay time of 700 ns inhibits short disturbing pulses.
The input IN is Low active.
The internal Turn on/ off Logic separates the functions of the input:
1. Dynamic switching on
The dynamic switching on condition is derived from the oscillator frequency.
In the case the input signal (rectangle, sinus, triangle) should meet the following frequency condition the
output of the Turn on/off Logic is set to High:
Dynamic switching on condition: fIN_ON > 0.6*fOSC
The turning-on delay time is a multiple of the oscillator frequency TPOSC. It has no fixed value but it
depends on the phase position and is between 2*TPOSC and 6*TPOSC.
The dimension has to set to 6*TPOSC (worst case).