LOW JITTER 5.0VDC PECL FULL-SIZE DIP CRYSTAL CLOCK OSCILLATORS ACPE FEATURES: * Low jitter PECL logic. * Tight overall frequency stability. * Fast Rise and Fall Times. * Complementary output. * Wide frequency range. APPLICATIONS: * Gigabit Ethernet. * Data telecommunications and networking. * xDSL, Stratum IV. * SONET/SDH STANDARD SPECIFICATIONS PARAMETERS Frequency Range Operation FrequencyMode Range (Fo) Operating Temperature (TOPR) Operating Temperature Storage Storage Temperature Temperature (TSTO) Frequency Tolerance @(DF/ 25C Frequency Stability Fo) Frequency Stability over Temp. Supply Voltage (Vdd) Equivalent Series Resistance Supply Current (Idd) (ESR) Maximum Duty cycle or Symmetry Rise and Fall times (Tr/Tf) Output Shunt C0 (pin 1) OutputCapacitance and E/D options Load Capacitance C L Output load Drive Level Output voltage Aging @ 25 C First Year Insulation Resistance Jitter Enable/Disable option (pin 1) Start-up time SPECIFICATIONS 3.5 MHz - 25 MHz Fundamental, 10.00 MHz -AT 200 MHz -10C 60 (see C (See Options) 0C toto+ +70C options) -55C to + 125 C -40C to +85C 50 ppm max. (See Options) 100 ppm max. (See Options) 50 ppm max. (See Options) +5 Vdc 5% 200 W for 3.5 MHz < F < 4.0 MHz 120mA max. 150 W for 4.0 MHz < F < 6.0 MHz 40/60% measured 100 Wmax. for 6.0 MHz < Fat<3.67VDC 10.0 MHz 5ns max. at < 20% 80%MHz level 80 Wmeasured for 10 MHz F