Preliminary Data Sheet u0560 N-Channel Power MOSFET Array Description Features The u0560 contains six N-channel power MOS FET with VDSS = 500 V in half-bridge configuration. These enhancement-mode Power MOSFET array utilizes a DMOS structure and alpha's dielectric isolated high voltage DIMOST technology. Each MOSFET provides an accurate fraction of the drain current through a current-sense terminal to be used for control or protection. The provision of a kelvin source connection eliminates problems of common source inductance. An additional second current-sense terminal of the low-side power MOSFET eases an independent current monitoring in every half bridge. q Six dielectric isolated N-channel power MOSFET with VDSS = 500 V, RDS(on) = 10 q Three fast switching half-bridges q High-side power MOSFET with a current sense source q Low-side power MOSFET with two current sense sources q Integrated gate protection diodes q High density mounting q Temperature range -25C ... +85C q Package QPF 64 - u0560EQ Die - u0560EX Applications q Three Phase Inverter q Suitable for motor driver and solenoid driver Equivalent Circuit u0560 D2H D1H M1H SD1 G3H K2H SD2 C2H C1H M1L K3H SD3 C3H M2L M3L G2L G1L June 1999 M3H G2H G1H K1H D3H M2H G3L K1L S1L K2L S2L K3L S3L C1L CM1 C2L CM2 C3L CM3 alpha microelectronics gmbh Pin Description Symbol Description D1H, D2H, D3H Drain terminal of the high-side MOSFET, supply terminal of the half bridge G1H, G2H, G3H Gate terminal of the high-side MOSFET SD1, SD2, SD3 Output of the half bridge, connection Source of high-side MOSFET to Drain of low-side MOSFET C1H, C2H, C3H Current-sense source terminal of the high-side MOSFET K1H, K2H, K3H Kelvin source terminal of the high-side MOSFET G1L, G2L, G3L Gate terminal of the low-side MOSFET S1L, S2L, S3L Source terminal of the low-side MOSFET, ground terminal of the half bridge C1L, C2L, C3L Current-sense source terminal of the low-side MOSFET CM1, CM2, CM3 Second current-sense source terminal of the low-side MOSFET K1L, K2L, K3L Kelvin source terminal of the low-side MOSFET Pinning / Pad Coordinates (QFP64 / Die) Symbol Pin Pad-X in m Pad-Y in m Symbol Pin Pad-X in m Pad-Y in m G1L 1 200 4850 G3L 16 200 1100 C1H 2 200 4600 C3L 17 200 850 K1H 3 200 4350 K3L 18 200 600 G1L 4 200 4100 D1H 50, 51 5000 5000 C1L 5 200 3850 SD1 48, 49 5000 4500 K1L 6 200 3600 CM1 47 5000 4100 G2H 7 200 3350 S1L 53, 54 4500 4000 C2H 8 200 3100 D2H 44, 45 5000 3200 K2H 9 200 2850 SD2 42, 43 5000 2700 G2L 10 200 2600 CM2 41 5000 2400 C2L 11 200 2350 S2L 39, 40 4500 2200 K2L 12 200 2100 D3H 37, 38 5000 1500 G3H 13 200 1850 SD3 35, 36 5000 1000 C3H 14 200 1600 CM3 34 5000 700 K3H 15 200 1350 S3L 31, 32 4500 500 Page 2 of 4 alpha microelectronics gmbh June 1999 Absolute Maximum Ratings at Tamb = -25 C ... +85 C Symbol Parameter Min Max Unit VDS Drain-to-Source Voltage 500 V IDM Peak Drain Current 1.2 A ID1 Tj = 95C, Continuous Drain Current, VGS = 10 V tbd A ID2 Tj = 145C, Continuous Drain Current, VGS = 10 V tbd A VGS Gate-to-Source Voltage -0.3 20 V Tj Junction Temperature -25 150 C Tstg Storage Temperature -55 150 C Electrical Characteristics DC Characteristics at Tamb = 25 C Symbol Parameter Conditions Min Typ Max Unit V(BR)DSS Drain-to-Source Breakdown Voltage VGS = 0, ID = 100 A 500 RDS(on) Static Drain-to-Source On-Resistance VGS = 10 V, ID = 0.2 A IDSS Drain-to-Source Leakage Current VDS = 450 V, VGS = 0 VGS Gate-to-Source Threshold Voltage VGS = VDS, ID = 100 A IGSS Gate-to-Source Leakage Current VGS = 20 V Qg Total Gate Charge VDS = 250 V, ID = 0.5 A tbd nC Ciss Input Capacitance tbd pF Coss Output Capacitance tbd pF Crss Output Capacitance tbd pF r1 Current Sense Ratio IDxx / ICxx ID = 0.2 A, VGS = 10 V tbd r2 Current Sense Ratio IDxL / ICMx ID = 0.2 A, VGS = 10 V tbd VSD Diode Forward Voltage ID = 0.2 A tbd V Rthja Thermal Resistance Junction-to-Ambient 70 K/W V tbd 12.5 10 A 1.5 2.5 V 100 nA AC Characteristics at Tamb = 25 C Symbol td(on) tr td(off) tf June 1999 Parameter Conditions Min Typ Max Unit Turn-On Delay Time VDS = 250 V, ID = 0.5 A tbd ns Rise Time VDS = 250 V, ID = 0.5 A tbd ns Turn-Off Delay Time VDS = 250 V, ID = 0.5 A tbd ns Fall Time VDS = 250 V, ID = 0.5 A tbd ns alpha microelectronics gmbh Page 3 of 4 Packaging QFP64 64 Pins a 0,4 23,2 17,2 12x1,00=12,00 51 33 52 32 14 0,1 1,00 64 20 1 Pin 1 19 2,57 - 2,87 1,00 18x1,00=18,00 3,4 max. 20 0,1 64-Pin Plastic Quad Flat Package Note It is not given warranty that the declared circuits, devices, facilities, components, assembly groups or treatments included herein are free from legal claims of third parties. The declared data are serving only to description of product. They are not guarantee properties as defined by law. The examples are given without obligation and cannot given rise to any liability. Reprinting this data sheet - or parts of it - is only allowed with a licence of the publisher. alpha microelectronics gmbh reserves the right to make changes on this specification without notice at any time. alpha microelectronics gmbh Im Technologiepark 1 15236 Frankfurt (Oder) Germany Tel Fax Internet email ++49-335-557 1750 ++49-335-557 1759 http://www.alpha-microelectronics.de alpha@alpha-microelectronics.de 0560DSHa.doc Page 4 of 4 alpha microelectronics gmbh June 1999